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公开(公告)号：US4864289A
公开(公告)日：1989-09-05
申请号：US9095
申请日：1987-01-23
摘要： A video display control system displays a multicolor animation pattern on a screen of a video display unit. The video display control system is mainly constructed by a video RAM (VRAM) and a video display processor (VDP). The VRAM stores animation pattern data, display position data and at least two color data. The VDP reads these data and makes an animation pattern image displayed in at least two colors at a display position on the screen. The animation pattern image, two colors and display position are determined by the animation pattern data, two color data and display position data. In another video display control system, the VRAM stores at least two sets of animation pattern data, display position data and color data. When displaying two animation patterns, the VDP effects a logical operation on the two color data with respect to the overlapping portion of the two patterns and makes the overlapping portion displayed in a new color corresponding to the operation result. When the animation patterns overlaps, the VDP can also deliver a collision signal in place of the logical operation, thereby enabling a CPU to recognize the position of the overlapping portion.
摘要翻译： 视频显示控制系统在视频显示单元的屏幕上显示多色动画图案。 视频显示控制系统主要由视频RAM（VRAM）和视频显示处理器（VDP）构成。 VRAM存储动画图案数据，显示位置数据和至少两个颜色数据。 VDP读取这些数据，并使屏幕上的显示位置以至少两种颜色显示动画图案图像。 动画图案图像，两种颜色和显示位置由动画图案数据，两种颜色数据和显示位置数据确定。 在另一个视频显示控制系统中，VRAM存储至少两组动画图案数据，显示位置数据和颜色数据。 当显示两个动画图案时，VDP相对于两个图案的重叠部分对两个颜色数据进行逻辑运算，并使得重叠部分以对应于操作结果的新颜色显示。 当动画图案重叠时，VDP也可以传递碰撞信号代替逻辑操作，从而使CPU能够识别重叠部分的位置。
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公开(公告)号：US4292873A
公开(公告)日：1981-10-06
申请号：US101904
申请日：1979-12-10
申请人： Takatoshi Okumura , Seiya Hamada , Akio Imamura
发明人： Takatoshi Okumura , Seiya Hamada , Akio Imamura
摘要： An electronic musical instrument comprises a key on-off memory for storing the on-off state of the respective keys, and at a time counter for counting the lapse of time after release of the respective keys. The time counter inhibits generation of the musical tone signal corresponding to the key when the conditions that predetermined time is elapsed after the key release and that the key-off state is stored in the memory are satisfied. This inhibition is separately conducted with respect to the keys. Thus, it can remarkably prevent noise when the tone should not be produced.
摘要翻译： 电子乐器包括用于存储各个键的开 - 关状态的键开关存储器，以及用于计数各个键释放之后的时间流逝的时间计数器。 当在键释放之后经过预定时间的条件并且关闭状态被存储在存储器中时，时间计数器抑制对应于该键的乐音信号的产生。 这种抑制分别针对键进行。 因此，当不应该产生音调时，可以显着地防止噪音。
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公开(公告)号：US4235142A
公开(公告)日：1980-11-25
申请号：US904
申请日：1979-01-04
申请人： Akira Nakada , Eiichiro Aoki , Akiyoshi Oya , Takatoshi Okumura , Yasuji Uchiyama , Eiichi Yamaga
发明人： Akira Nakada , Eiichiro Aoki , Akiyoshi Oya , Takatoshi Okumura , Yasuji Uchiyama , Eiichi Yamaga
CPC分类号： G10H1/28 , G10H1/182 , G10H1/36 , G10H2210/221
摘要： An electronic musical instrument is of a time-shared digital processing type and capable of producing musical tones for a special performance. There are provided, at suitable time intervals, time periods in which no key code of a depressed key is produced by a key coder. During these time periods, a signal designating a special performance is generated. In a channel assignment circuit which assigns key codes of depressed keys to plural tone production channels there is provided a channel for an exclusive use for the special performance. A circuit for assigning data for the special performance transmits the data to the channel assignment circuit in response to the special performance designation signal from the key coder so that the data selected from among the key data already assigned to the tone production channels for ordinary performance are sequentially assigned to the channel allotted exclusively for the special performance. As an example of the special performance, description is made with respect to an automatic arpeggio performance in which tones are produced at designated orders of location from the lowest tone among the tones of the depressed keys.
摘要翻译： 电子乐器具有时间共享的数字处理类型，能够产生用于特殊表演的乐音。 以合适的时间间隔提供了一个键控编码器不产生按下的键的键码的时间段。 在这些时间段内，产生指定特殊性能的信号。 在向多个音调产生频道分配按下的键的键码的频道分配电路中，提供专用于特殊演奏的频道。 用于分配用于特殊性能的数据的电路响应于来自密钥编码器的特殊性能指定信号将数据发送到信道分配电路，使得从已经分配给用于普通性能的音调产生信道的密钥数据中选择的数据是 顺序分配给专门用于特殊演出的频道。 作为特殊性能的一个例子，对于自动琶音性能进行描述，其中在按下的按键的音调之间的最低音调的指定指定的位置产生音调。
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公开(公告)号：US4109208A
公开(公告)日：1978-08-22
申请号：US556951
申请日：1975-03-10
CPC分类号： G10H7/04 , G10H1/0575
摘要： In a waveform producing system for use in, for example, an electronic musical instrument, a tone generator circuit and/or a tone control circuit including tone keyer circuits, each or either one of said tone generator circuit and said tone control circuit comprises: pulse generators associated with key-actuated switches, respectively; waveform memorizing means having at least one row of voltage dividers of which the division ratios are preset in characteristics corresponding to either the tone waveforms, the tone envelopes or the depression speeds of the key operated by the player of the instrument; sequential memory read-out means connected to the respective voltage dividers; and pulse generators thereby providing an enabling signal sequentially to the individual dividers every time a pulse is inputted from the pulse generators to read-out the memorized waveform in the form of a modified audio signal at the output side of the circuit. The memorized waveforms can arbitrarily be sampled (scanned) out by using a sampling circuit in the read-out means, thereby providing variations in the modified audio signal. The tone control circuit enables the tone level control in conformity to the depression speed of the key and tone envelope control without the need to employ the conventional charge-discharge circuit requiring a relatively large capacitance capacitor, and makes it easy to carry out circuit integration.
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公开(公告)号：US20100331702A1
公开(公告)日：2010-12-30
申请号：US12815825
申请日：2010-06-15
申请人： Hironobu HONGOU , Takatoshi OKUMURA , Kazuhito NAKATA , Kenichi UNAYAMA , Takeshi FUKASAWA , Takayuki SHIINA , Fumio MOCHIZUKI
发明人： Hironobu HONGOU , Takatoshi OKUMURA , Kazuhito NAKATA , Kenichi UNAYAMA , Takeshi FUKASAWA , Takayuki SHIINA , Fumio MOCHIZUKI
IPC分类号： A61B8/14
CPC分类号： A61B8/14 , A61B8/546 , G10K11/004
摘要： According to one embodiment, an ultrasonic probe includes a probe unit and cooling unit. The probe unit is obtained by arranging, in a housing, a transducer unit which transmits and receives ultrasonic waves with an object to be examined, an electronic circuit unit which is connected to the transducer unit and performs electrical signal processing, and a heat transfer member which is made of a material having a heat transfer coefficient higher than that of the electronic circuit unit, and transfers heat of the electronic circuit unit to a housing surface. The cooling unit is detachably mounted on the housing of the probe unit, and cools the heat transfer member by passing a coolant in a channel formed inside the cooling unit.
摘要翻译： 根据一个实施例，超声波探头包括探针单元和冷却单元。 探针单元通过在外壳中布置与被检查物体发送和接收超声波的换能器单元，连接到换能器单元并进行电信号处理的电子电路单元，以及传热构件 其由具有高于电子电路单元的传热系数的材料制成，并且将电子电路单元的热量传递到壳体表面。 冷却单元可拆卸地安装在探针单元的壳体上，并且通过在冷却单元内形成的通道中使冷却剂通过来冷却传热构件。
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公开(公告)号：US5444687A
公开(公告)日：1995-08-22
申请号：US36437
申请日：1993-03-24
申请人： Takatoshi Okumura
发明人： Takatoshi Okumura
IPC分类号： G11B7/00 , G11B7/0045 , G11B7/005 , G11B7/085 , G11B7/125 , G11B11/105 , G11B19/28 , G11B20/10 , G11B20/12 , G11B20/14 , G11B27/10
CPC分类号： G11B7/126 , G11B19/28 , G11B20/10 , G11B27/105 , G11B7/0045 , G11B7/005 , G11B7/085 , G11B11/10595 , G11B20/1258 , G11B20/1403
摘要： In a method and a device for accessing an optical disc such as a Compact Disc, a CD-ROM, a CD-I and a MD, an optical disc in which data is recorded or to be recorded at a constant linear velocity is rotated at a substantially constant number of revolution per unit time and this optical disc is accessed on the basis of a clock signal which changes its frequency in accordance with an access position (i.e., a read position or write position). Since random accessing is made in a state in which the optical disc is rotated at a substantially constant number of revolution per unit time, it is not necessary to wait in accessing until a stable revolution number is attained but the waiting time is determined only by time required for moving of the read head. This enables the waiting time to be reduced and thereby realizes accessing to the optical disc at a higher speed.
摘要翻译： 在用于访问诸如光盘，CD-ROM，CD-I和MD的光盘的方法和装置中，以恒定线速度记录数据或以恒定线速度记录的光盘被旋转 基于每单位时间基本上恒定的转数，并且该光盘是基于根据访问位置（即，读取位置或写入位置）改变其频率的时钟信号来访问的。 由于在光盘以每单位时间大致恒定的转数旋转的状态下进行随机访问，因此不需要等待访问直到获得稳定的转数，而是仅通过时间确定等待时间 移动读取头所需的。 这使得能够降低等待时间，从而以更高的速度实现对光盘的访问。
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公开(公告)号：US5416497A
公开(公告)日：1995-05-16
申请号：US943706
申请日：1992-09-11
摘要： A video display control system displays a multicolor animation pattern on a screen of a video display unit. The video display control system is mainly constructed by a video RAM (VRAM) and a video display processor (VDP). The VRAM stores animation pattern data, display position data and at least two color data. The VDP reads these data and makes an animation pattern image displayed in at least two colors at a display position on the screen. The animation pattern image, two colors and display position are determined by the animation pattern data, two color data and display position data. In another video display control system, the VRAM stores at least two sets of animation pattern data, display position data and color data. When displaying two animation patterns, the VDP effects a logical operation on the two color data with respect to the overlapping portion of the two patterns and makes the overlapping portion displayed in a new color corresponding to the operation result. When the animation patterns overlaps, the VDP can also deliver a collision signal in place of the logical operation, thereby enabling a CPU to recognize the position of the overlapping portion.
摘要翻译： 视频显示控制系统在视频显示单元的屏幕上显示多色动画图案。 视频显示控制系统主要由视频RAM（VRAM）和视频显示处理器（VDP）构成。 VRAM存储动画图案数据，显示位置数据和至少两个颜色数据。 VDP读取这些数据，并使屏幕上的显示位置以至少两种颜色显示动画图案图像。 动画图案图像，两种颜色和显示位置由动画图案数据，两种颜色数据和显示位置数据确定。 在另一个视频显示控制系统中，VRAM存储至少两组动画图案数据，显示位置数据和颜色数据。 当显示两个动画图案时，VDP相对于两个图案的重叠部分对两个颜色数据进行逻辑运算，并使得重叠部分以对应于操作结果的新颜色显示。 当动画图案重叠时，VDP也可以传递碰撞信号代替逻辑操作，从而使CPU能够识别重叠部分的位置。
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公开(公告)号：US4812828A
公开(公告)日：1989-03-14
申请号：US106007
申请日：1987-10-07
CPC分类号： G06F3/038
摘要： A video display processor (VDP) is connectable to an input control device such as a light pen and a mouse. The VDP comprises a counter circuit which is composed of an X counter and a Y counter. When a mouse mode is selected, X and Y pulse signals are supplied to the X and Y counters so that the contents of the X and Y counters represent the amount of movement of the mouse. When a central processing unit (CPU) connected to the VDP reads the contents of the X and Y counters in this mouse mode, the X and Y counters are reset. When a light pen mode is selected, the X and Y counters effect a count operation of a clock signal generated in the VDP in synchronism with the display of image on a screen so that the contents of the X and Y counters represents X-Y coordinates of a display element which is currently displayed on the screen. The CPU reads the contents of the X and Y counters in response to a light detection signal outputted from the light pen thereby to input the X-Y coordinates of the display element selected by the light pen. In a collision detection mode, the counter circuit effects the same counting operation as that effected in the light pen mode. The CPU reads the contents of the X and Y counters in response to a collision detection signal, which is generated by an associated circuit when animation patterns of the video image displayed on the screen overlap, thereby to input the X-Y coordinates of the collision position.
摘要翻译： 视频显示处理器（VDP）可连接到诸如光笔和鼠标之类的输入控制装置。 VDP包括由X计数器和Y计数器组成的计数器电路。 当选择鼠标模式时，X和Y脉冲信号被提供给X和Y计数器，使得X和Y计数器的内容表示鼠标的移动量。 当连接到VDP的中央处理单元（CPU）在该鼠标模式下读取X和Y计数器的内容时，X和Y计数器被复位。 当选择光笔模式时，X和Y计数器与屏幕上的图像的显示同步地影响在VDP中产生的时钟信号的计数操作，使得X和Y计数器的内容表示XY坐标 当前显示在屏幕上的显示元素。 CPU响应于从光笔输出的光检测信号读取X和Y计数器的内容，从而输入由光笔选择的显示元件的X-Y坐标。 在碰撞检测模式中，计数器电路实现与在光笔模式中实现的相同的计数操作。 响应于在屏幕上显示的视频图像的动画图案重叠时由相关联的电路产生的冲突检测信号，CPU读取X和Y计数器的内容，从而输入碰撞位置的X-Y坐标。
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公开(公告)号：US4737778A
公开(公告)日：1988-04-12
申请号：US736827
申请日：1985-05-22
CPC分类号： G09G5/346
摘要： There is provided a video display controller which can vertically and horizontally shift a whole video image displayed on a screen of a video display unit. The video display controller comprises an image data read circuit which reads the image data from a video RAM, a register into which data representative of amount of shift of the video image is stored by a central processing unit, and a first counter which cyclicly counts a clock signal. An adder adds the data contained in the register and a count output of the first counter, and at a timing determined by this addition result a predetermined value is preset into a second counter. This second counter counts the clock signal from the predetermined value, and the image data read by the image data read circuit is outputted to the video display unit at a timing in accordance with a count output of this second counter. The register, first counter, adder and second counter are provided in each of vertical and horizontal scanning control circuits.
摘要翻译： 提供了一种视频显示控制器，其可以垂直和水平地移动显示在视频显示单元的屏幕上的整个视频图像。 视频显示控制器包括从视频RAM读取图像数据的图像数据读取电路，由中央处理单元存储表示视频图像的移位量的数据的寄存器和循环计数视频图像的第一计数器 时钟信号。 加法器将包含在寄存器中的数据和第一计数器的计数输出相加，并且在由该相加结果确定的定时将预定值预设为第二计数器。 该第二计数器从预定值对时钟信号进行计数，并且由图像数据读取电路读取的图像数据根据该第二计数器的计数输出在定时输出到视频显示单元。 在每个垂直扫描控制电路和水平扫描控制电路中都设置寄存器，第一计数器，加法器和第二计数器。
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公开(公告)号：US4684942A
公开(公告)日：1987-08-04
申请号：US736761
申请日：1985-05-22
CPC分类号： G09G5/06
摘要： A video display controller is provided with a color palette circuit which is capable of converting, at a high conversion rate, color codes read from a VRAM (video RAM) into RGB color data to be supplied to a CRT display unit. The color palette circuit comprises a plurality of color data registers each storing one RGB color data and is supplied with a timing signal synchronized with the display timing of display elements on the CRT display screen. Each color code data including at least two color codes and read from an address of the VRAM is first supplied to a selection circuit which includes at least two decoders. Each decoder decodes the corresponding color codes to generate a selection signal which enables one of the color data registers to output the RGB color data contained therein. Thus, at least two RGB color data are outputted from the color data registers enabled by the outputs of the decoders, and are supplied to an output control circuit which outputs each of these RGB color data in a multiplexing fashion in accordance with the timing signal.
摘要翻译： 视频显示控制器具有调色板电路，该调色板电路能够以高转换率将从VRAM（视频RAM）读取的颜色代码转换为RGB颜色数据以提供给CRT显示单元。 调色板电路包括多个颜色数据寄存器，每个存储一个RGB颜色数据，并且被提供有与CRT显示屏上的显示元件的显示定时同步的定时信号。 包括至少两个颜色代码并从VRAM的地址读取的每个颜色代码数据首先被提供给包括至少两个解码器的选择电路。 每个解码器对相应的颜色代码进行解码以产生选择信号，其使得一个颜色数据寄存器能够输出其中包含的RGB颜色数据。 因此，从由解码器的输出启用的彩色数据寄存器中输出至少两个RGB颜色数据，并且被提供给输出控制电路，该输出控制电路根据定时信号以多路复用方式输出这些RGB色彩数据。
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