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公开(公告)号：US20120324199A1
公开(公告)日：2012-12-20
申请号：US13391566
申请日：2010-03-04
申请人： Ryozo Yamashita , Hiroyasu Nishiyama , Tomoya Ohta
发明人： Ryozo Yamashita , Hiroyasu Nishiyama , Tomoya Ohta
IPC分类号： G06F12/00
CPC分类号： G06F12/0269
摘要： Disclosed is a computer system for reliably running a plurality of programs performing garbage collection with less physical memory than in the past. For this purpose, there is disclosed a memory management method that releases unneeded areas in a plurality of memory areas that have been used by each of a plurality of programs stored in memory and executed on a processing unit, the processing unit acquires an index for determining the start of releasing a memory area, compares the index with a predetermined threshold, and when the index exceeds the threshold, selects one of the plurality of programs, collects unneeded areas of the memory areas used by the selected program, and releases the collected areas.
摘要翻译： 公开了一种用于以比过去更少的物理存储器可靠地运行执行垃圾回收的多个程序的计算机系统。 为此，公开了一种存储器管理方法，其释放由存储在存储器中并在处理单元上执行的多个程序中的每一个使用的多个存储区域中的不需要的区域，处理单元获取用于确定的索引 开始释放存储区域，将索引与预定阈值进行比较，并且当索引超过阈值时，选择多个程序中的一个程序，收集所选程序使用的存储区域的不需要的区域，并释放所收集的区域 。
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公开(公告)号：US4864289A
公开(公告)日：1989-09-05
申请号：US9095
申请日：1987-01-23
摘要： A video display control system displays a multicolor animation pattern on a screen of a video display unit. The video display control system is mainly constructed by a video RAM (VRAM) and a video display processor (VDP). The VRAM stores animation pattern data, display position data and at least two color data. The VDP reads these data and makes an animation pattern image displayed in at least two colors at a display position on the screen. The animation pattern image, two colors and display position are determined by the animation pattern data, two color data and display position data. In another video display control system, the VRAM stores at least two sets of animation pattern data, display position data and color data. When displaying two animation patterns, the VDP effects a logical operation on the two color data with respect to the overlapping portion of the two patterns and makes the overlapping portion displayed in a new color corresponding to the operation result. When the animation patterns overlaps, the VDP can also deliver a collision signal in place of the logical operation, thereby enabling a CPU to recognize the position of the overlapping portion.
摘要翻译： 视频显示控制系统在视频显示单元的屏幕上显示多色动画图案。 视频显示控制系统主要由视频RAM（VRAM）和视频显示处理器（VDP）构成。 VRAM存储动画图案数据，显示位置数据和至少两个颜色数据。 VDP读取这些数据，并使屏幕上的显示位置以至少两种颜色显示动画图案图像。 动画图案图像，两种颜色和显示位置由动画图案数据，两种颜色数据和显示位置数据确定。 在另一个视频显示控制系统中，VRAM存储至少两组动画图案数据，显示位置数据和颜色数据。 当显示两个动画图案时，VDP相对于两个图案的重叠部分对两个颜色数据进行逻辑运算，并使得重叠部分以对应于操作结果的新颜色显示。 当动画图案重叠时，VDP也可以传递碰撞信号代替逻辑操作，从而使CPU能够识别重叠部分的位置。
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公开(公告)号：US4737772A
公开(公告)日：1988-04-12
申请号：US739036
申请日：1985-05-29
摘要： A video display processor (VDP) produces a video signal by which a black and white image of an increased gradation can be displayed on a video display unit. The VDP reads from a video RAM (VRAM) either color codes each representative of a color of each display element, or amplitude data representative of amplitudes of a video signal to be reproduced. When displaying an image based on the color codes, the color codes are converted by a color palette circuit into color data each composed of three primary color data, and then supplied to a digital color encoder. The digital color encoder multiplies each of the three color data by predetermined coefficients at proper phase timings to output data representative of three chrominance signals. This output data is summed by an adder circuit and then converted into an analog signal to be supplied to the video display unit as the video signal. When displaying an image based on the amplitude data, the color palette circuit converts the amplitude data into gradation data. The digital color encoder multiplies the gradation data by other proper coefficients so that data proportional in value to the gradation data are obtained at the output of the adder circuit. This data is converted into an analog signal to thereby reproduce the video signal.
摘要翻译： 视频显示处理器（VDP）产生视频信号，通过该视频信号可以在视频显示单元上显示增加灰度的黑白图像。 VDP从视频RAM（VRAM）读取每个代表每个显示元件的颜色的颜色代码，或表示要再现的视频信号的幅度的幅度数据。 当基于颜色代码显示图像时，颜色代码由调色板电路转换成每个由三个基色数据组成的颜色数据，然后提供给数字颜色编码器。 数字彩色编码器以适当的相位定时将三个颜色数据中的每一个乘以预定系数，以输出表示三个色度信号的数据。 该输出数据由加法器电路求和，然后转换为模拟信号，以供应给视频显示单元作为视频信号。 当基于幅度数据显示图像时，调色板电路将振幅数据转换为灰度数据。 数字彩色编码器将灰度数据乘以其他适当的系数，使得在加法器电路的输出处获得与灰度数据成比例的数据。 该数据被转换成模拟信号从而再现视频信号。
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公开(公告)号：US4628467A
公开(公告)日：1986-12-09
申请号：US735370
申请日：1985-05-17
申请人： Kazuhiko Nishi , Takatoshi Ishii , Ryozo Yamashita , Shigemitsu Yamaoka , Takatoshi Okumura , Minoru Morimoto
发明人： Kazuhiko Nishi , Takatoshi Ishii , Ryozo Yamashita , Shigemitsu Yamaoka , Takatoshi Okumura , Minoru Morimoto
摘要： A video display control system comprises a video display processor (VDP) which is capable of accessing to a video RAM (VRAM) at an extremely high-speed. The VRAM used in this system comprises first and second dynamic RAMs each having an address input terminal to which row address data and column address data are supplied, a row address strobe input terminal, a column address strobe input terminal, and a data input/output terminal. The row address data is latched at the leading edge of a row address strobe signal applied to the row address strobe input terminal, while the column address data is latched at the leading edge of a column address strobe signal applied to the column address strobe input terminal. An access to an address of each dynamic RAM is established when both of the row and column address data are latched. The VDP comprises a VRAM interface for controlling an access to the first and second dynamic RAMs which is connected to the RAMs through a common address bus. The VRAM interface first outputs row address data together with a row address strobe signal RAS and then outputs column address data together with two column address strobe signals CAS0 and CAS1 which are rendered active in sequence and supplied to the first and second dynamic RAMs, respectively.
摘要翻译： 视频显示控制系统包括能够以极高速度访问视频RAM（VRAM）的视频显示处理器（VDP）。 该系统中使用的VRAM包括第一和第二动态RAM，每个具有地址输入端，行地址数据和列地址数据被提供给地址输入端，行地址选通输入端，列地址选通输入端和数据输入/输出 终奌站。 行地址数据被锁存在施加到行地址选通输入端的行地址选通信号的前沿，而列地址数据被锁存在施加到列地址选通输入端的列地址选通信号的前沿 。 当锁存行和列地址数据时，建立对每个动态RAM的地址的访问。 VDP包括用于控制通过公共地址总线连接到RAM的第一和第二动态RAM的访问的VRAM接口。 VRAM接口首先将行地址数据与行地址选通信号和上拉和下拉一起输出，然后将列地址数据与两个列地址选通信号和上拉和C和＆amp;上拉和C依次输出并提供给第一和第二动态RAM ， 分别。
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公开(公告)号：US4804948A
公开(公告)日：1989-02-14
申请号：US77984
申请日：1987-07-27
CPC分类号： G09G5/026
摘要： A video display control system displays a video image composed of a plurality of display elements on a screen of a video display unit. The system comprises a memory (VRAM) for storing a plurality of color codes each representing at least one display element and a video display controller (VDP). The VDP comprises a mode register for selecting one of normal display and transparency processing modes, display processing circuit for reading the color codes from the VRAM, a backdrop color register for storing a color code such as one representing a backdrop color, a detection circuit for detecting a predetermined color code from the color codes read by the display processing circuit, and a selector controlled by an output of the detection circuit. In the normal display mode, the selector outputs all color codes read by the display processing circuit to the display unit. In the transparency processing mode, the selector outputs the color codes read by the display processing circuit to the display unit when the predetermined color code is not detected, and outputs the color code contained in the backdrop color register to the display unit when the predetermined color code is detected. The VDP further comprises another detection circuit for detecting a second predetermined color code from the color codes outputted from the selector to output a control signal. And if the second predetermined color code is detected in the transparency processing mode, the display unit displays an image in accordance with an external video signal.
摘要翻译： 视频显示控制系统在视频显示单元的屏幕上显示由多个显示元件组成的视频图像。 该系统包括用于存储代表至少一个显示元件和视频显示控制器（VDP）的多个颜色代码的存储器（VRAM）。 VDP包括用于选择正常显示和透明度处理模式之一的模式寄存器，用于从VRAM读取颜色代码的显示处理电路，用于存储诸如表示背景颜色的颜色代码的颜色代码的背景颜色寄存器，用于 从由显示处理电路读取的颜色代码检测预定的颜色代码，以及由检测电路的输出控制的选择器。 在正常显示模式下，选择器将由显示处理电路读出的所有颜色代码输出到显示单元。 在透明度处理模式中，当未检测到预定颜色代码时，选择器将由显示处理电路读取的颜色代码输出到显示单元，并且当预定颜色在显示单元中输出包含在背景颜色寄存器中的颜色代码 检测到代码。 VDP还包括用于从从选择器输出的颜色代码中检测第二预定颜色代码以输出控制信号的另一个检测电路。 并且如果在透明度处理模式中检测到第二预定颜色代码，则显示单元根据外部视频信号显示图像。
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公开(公告)号：US4660070A
公开(公告)日：1987-04-21
申请号：US736828
申请日：1985-05-22
摘要： A video display processor (VDP) for use with a central processing unit, a video RAM (VRAM) and a video display unit is capable of writing video image data supplied from an external video device such as a television set into the VRAM. The VDP comprises a first input terminal for receiving the external video image data and a second input terminal for receiving horizontal and vertical synchronization signals from the external video device. The VDP generates address data in accordance with the horizontal and vertical synchronization signals and supplies the address data to the VRAM when processing of the external video image data is designated. The VDP also supplies the received external video image data to the VRAM thereby to write the external video image data into addresses of the VRAM designated by the address data. The external video image data may be either color codes representative of colors of display elements of a video image displayed at the external video device or data representative of amplitude levels of an analog video signal outputted from the external video device.
摘要翻译： 与中央处理单元，视频RAM（VRAM）和视频显示单元一起使用的视频显示处理器（VDP）能够将从诸如电视机的外部视频设备提供的视频图像数据写入到VRAM中。 VDP包括用于接收外部视频图像数据的第一输入端子和用于从外部视频装置接收水平和垂直同步信号的第二输入端子。 VDP根据水平和垂直同步信号产生地址数据，并且在指定外部视频图像数据的处理时将地址数据提供给VRAM。 VDP还将接收到的外部视频图像数据提供给VRAM，从而将外部视频图像数据写入由地址数据指定的VRAM的地址。 外部视频图像数据可以是表示在外部视频设备上显示的视频图像的显示元素的颜色的颜色代码或表示从外部视频设备输出的模拟视频信号的幅度电平的数据。
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7.发明申请MEMORY MANAGEMENT METHOD, COMPUTER SYSTEM, AND STORAGE MEDIUM HAVING PROGRAM STORED THEREON 审中-公开存储管理方法，计算机系统和存储程序存储介质公开(公告)号：US20120166744A1
公开(公告)日：2012-06-28
申请号：US13322067
申请日：2010-05-19
申请人： Ryozo Yamashita , Hiroyasu Nishiyama , Tomoya Ohta
发明人： Ryozo Yamashita , Hiroyasu Nishiyama , Tomoya Ohta
IPC分类号： G06F12/00
CPC分类号： G06F12/0261 , G06F2212/151
摘要： A memory management method, which is used in a computer including a CPU and a memory to unload an area no longer necessary out of a memory area used by a program stored in the memory and executed by the CPU, comprising: generating a first processing system for executing the program in the memory; generating a second processing system in the memory when a first opportunity occurs; copying a content of a memory area of the first processing system to a memory area of the second processing system; determining an unnecessary area out of the copied memory area of the second processing system; transmitting a determination result regarding the unnecessary area to the program of the first processing system when a second opportunity occurs receiving the determination result; unloading the unnecessary area in the memory area of the first processing system.
摘要翻译： 一种存储器管理方法，其用于包括CPU和存储器的计算机，所述存储器用于卸载存储在存储器中并由CPU执行的由程序使用的存储区域所不再需要的区域，包括：生成第一处理系统 用于在存储器中执行程序; 当发生第一次机会时，在存储器中产生第二处理系统; 将第一处理系统的存储区域的内容复制到第二处理系统的存储区域; 确定所述第二处理系统的复制存储区域中的不必要区域; 当接收到所述确定结果的第二机会发生时，将关于所述不必要区域的确定结果发送到所述第一处理系统的程序; 卸载第一处理系统的存储区域中的不必要区域。
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公开(公告)号：US5416497A
公开(公告)日：1995-05-16
申请号：US943706
申请日：1992-09-11
摘要： A video display control system displays a multicolor animation pattern on a screen of a video display unit. The video display control system is mainly constructed by a video RAM (VRAM) and a video display processor (VDP). The VRAM stores animation pattern data, display position data and at least two color data. The VDP reads these data and makes an animation pattern image displayed in at least two colors at a display position on the screen. The animation pattern image, two colors and display position are determined by the animation pattern data, two color data and display position data. In another video display control system, the VRAM stores at least two sets of animation pattern data, display position data and color data. When displaying two animation patterns, the VDP effects a logical operation on the two color data with respect to the overlapping portion of the two patterns and makes the overlapping portion displayed in a new color corresponding to the operation result. When the animation patterns overlaps, the VDP can also deliver a collision signal in place of the logical operation, thereby enabling a CPU to recognize the position of the overlapping portion.
摘要翻译： 视频显示控制系统在视频显示单元的屏幕上显示多色动画图案。 视频显示控制系统主要由视频RAM（VRAM）和视频显示处理器（VDP）构成。 VRAM存储动画图案数据，显示位置数据和至少两个颜色数据。 VDP读取这些数据，并使屏幕上的显示位置以至少两种颜色显示动画图案图像。 动画图案图像，两种颜色和显示位置由动画图案数据，两种颜色数据和显示位置数据确定。 在另一个视频显示控制系统中，VRAM存储至少两组动画图案数据，显示位置数据和颜色数据。 当显示两个动画图案时，VDP相对于两个图案的重叠部分对两个颜色数据进行逻辑运算，并使得重叠部分以对应于操作结果的新颜色显示。 当动画图案重叠时，VDP也可以传递碰撞信号代替逻辑操作，从而使CPU能够识别重叠部分的位置。
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公开(公告)号：US4812828A
公开(公告)日：1989-03-14
申请号：US106007
申请日：1987-10-07
CPC分类号： G06F3/038
摘要： A video display processor (VDP) is connectable to an input control device such as a light pen and a mouse. The VDP comprises a counter circuit which is composed of an X counter and a Y counter. When a mouse mode is selected, X and Y pulse signals are supplied to the X and Y counters so that the contents of the X and Y counters represent the amount of movement of the mouse. When a central processing unit (CPU) connected to the VDP reads the contents of the X and Y counters in this mouse mode, the X and Y counters are reset. When a light pen mode is selected, the X and Y counters effect a count operation of a clock signal generated in the VDP in synchronism with the display of image on a screen so that the contents of the X and Y counters represents X-Y coordinates of a display element which is currently displayed on the screen. The CPU reads the contents of the X and Y counters in response to a light detection signal outputted from the light pen thereby to input the X-Y coordinates of the display element selected by the light pen. In a collision detection mode, the counter circuit effects the same counting operation as that effected in the light pen mode. The CPU reads the contents of the X and Y counters in response to a collision detection signal, which is generated by an associated circuit when animation patterns of the video image displayed on the screen overlap, thereby to input the X-Y coordinates of the collision position.
摘要翻译： 视频显示处理器（VDP）可连接到诸如光笔和鼠标之类的输入控制装置。 VDP包括由X计数器和Y计数器组成的计数器电路。 当选择鼠标模式时，X和Y脉冲信号被提供给X和Y计数器，使得X和Y计数器的内容表示鼠标的移动量。 当连接到VDP的中央处理单元（CPU）在该鼠标模式下读取X和Y计数器的内容时，X和Y计数器被复位。 当选择光笔模式时，X和Y计数器与屏幕上的图像的显示同步地影响在VDP中产生的时钟信号的计数操作，使得X和Y计数器的内容表示XY坐标 当前显示在屏幕上的显示元素。 CPU响应于从光笔输出的光检测信号读取X和Y计数器的内容，从而输入由光笔选择的显示元件的X-Y坐标。 在碰撞检测模式中，计数器电路实现与在光笔模式中实现的相同的计数操作。 响应于在屏幕上显示的视频图像的动画图案重叠时由相关联的电路产生的冲突检测信号，CPU读取X和Y计数器的内容，从而输入碰撞位置的X-Y坐标。
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公开(公告)号：US4747042A
公开(公告)日：1988-05-24
申请号：US683696
申请日：1984-12-19
申请人： Takatoshi Ishii , Ryozo Yamashita , Kazuhiko Nishi
发明人： Takatoshi Ishii , Ryozo Yamashita , Kazuhiko Nishi
CPC分类号： G09G5/393
摘要： An improved display control system for use in a computer is disclosed which is equipped with functions of X, Y addressing and area movement so as to reduce the execution time necessary for display operations of the computer. Also, in this display control system, means for executing line commands is composed of the hardware so as to reduce the execution time necessary for display operations on the line commands.
摘要翻译： 公开了一种用于计算机的改进的显示控制系统，其配备有X，Y寻址和区域移动的功能，以便减少计算机的显示操作所需的执行时间。 此外，在该显示控制系统中，用于执行线路命令的装置由硬件组成，以便减少对线路命令的显示操作所需的执行时间。
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