Bottom drive rail-less window regulator
    1.
    发明授权
    Bottom drive rail-less window regulator 有权
    底部无轨道调节器

    公开(公告)号:US08196350B2

    公开(公告)日:2012-06-12

    申请号:US12399105

    申请日:2009-03-06

    Abstract: A window regulator assembly is described that comprises a window bracket that is in contact with the bottom edge of the window; a cable; a carrier plate that is in contact with the window bracket and both ends of the cable; a tension spring located on each end of the cable; an upper bracket assembly; a drum housing having a cable drum; a hollow conduit located between the upper bracket assembly and the drum housing; and a drive unit. The upper bracket assembly, cable drum, and conduit are capable of slideably receiving the cable, while the tension springs provide a predetermined amount of tension to the cable in order for the window regulator assembly to move the window between open and closed positions. Many of the components of the window regulator assembly may be formed from a thermoplastic material.

    Abstract translation: 描述了一种窗口调节器组件,其包括与窗口的底部边缘接触的窗口支架; 电缆 承载板,其与窗架和电缆的两端接触; 位于电缆每端的拉伸弹簧; 上支架总成; 具有电缆卷筒的鼓壳体; 位于上托架组件和滚筒壳体之间的中空导管; 和驱动单元。 上支架组件,电缆滚筒和导管能够可滑动地接收电缆,而拉伸弹簧为电缆提供预定量的张力,以使窗户调节器组件在打开位置和闭合位置之间移动窗口。 窗口调节器组件的许多部件可以由热塑性材料形成。

    AGC circuit
    2.
    发明授权
    AGC circuit 有权
    AGC电路

    公开(公告)号:US07982541B2

    公开(公告)日:2011-07-19

    申请号:US12757939

    申请日:2010-04-09

    CPC classification number: H03G3/001 H03G3/3026

    Abstract: A count control signal generating section for generating a count control signal on the basis of an output signal of a variable gain amplifier; an up/down counter for performing an up-count operation or a down-count operation on the basis of the count control signal; a gain control signal generating section for generating a gain control signal to be supplied to the variable gain amplifier on the basis of a count value of the up/down counter; and a state detector section for outputting a state detection signal indicating whether a state of a circuit operation is a steady state or another state are provided. When the state detection signal indicates that the state of the circuit operation is the steady state, the operation of at least one of the up/down counter and the gain control signal generating section is controlled so as to fix the gain control signal.

    Abstract translation: 计数控制信号生成部,其根据可变增益放大器的输出信号生成计数控制信号; 一个用于根据计数控制信号进行递增计数操作或递减计数操作的向上/向下计数器; 增益控制信号产生部分,用于根据上/下计数器的计数值产生要提供给可变增益放大器的增益控制信号; 以及状态检测器部分,用于输出指示电路操作的状态是稳态还是另一状态的状态检测信号。 当状态检测信号指示电路操作的状态是稳定状态时,控制上/下计数器和增益控制信号产生部分中的至少一个的操作,以固定增益控制信号。

    BOTTOM DRIVE RAIL-LESS WINDOW REGULATOR
    3.
    发明申请
    BOTTOM DRIVE RAIL-LESS WINDOW REGULATOR 有权
    底部驱动无轨调节器

    公开(公告)号:US20100223852A1

    公开(公告)日:2010-09-09

    申请号:US12399105

    申请日:2009-03-06

    Abstract: A window regulator assembly is described that comprises a window bracket that is in contact with the bottom edge of the window; a cable; a carrier plate that is in contact with the window bracket and both ends of the cable; a tension spring located on each end of the cable; an upper bracket assembly; a drum housing having a cable drum; a hollow conduit located between the upper bracket assembly and the drum housing; and a drive unit. The upper bracket assembly, cable drum, and conduit are capable of slideably receiving the cable, while the tension springs provide a predetermined amount of tension to the cable in order for the window regulator assembly to move the window between open and closed positions. Many of the components of the window regulator assembly may be formed from a thermoplastic material.

    Abstract translation: 描述了一种窗口调节器组件,其包括与窗口的底部边缘接触的窗口支架; 电缆 承载板,其与窗架和电缆的两端接触; 位于电缆每端的拉伸弹簧; 上支架总成; 具有电缆卷筒的鼓壳体; 位于上托架组件和滚筒壳体之间的中空导管; 和一个驱动单元。 上支架组件,电缆滚筒和导管能够可滑动地接收电缆,而拉伸弹簧为电缆提供预定量的张力,以使窗户调节器组件在打开位置和闭合位置之间移动窗口。 窗口调节器组件的许多部件可以由热塑性材料形成。

    AGC circuit
    4.
    发明授权

    公开(公告)号:US07411456B2

    公开(公告)日:2008-08-12

    申请号:US11200130

    申请日:2005-08-10

    Applicant: Takuma Ishida

    Inventor: Takuma Ishida

    CPC classification number: H03G3/3026

    Abstract: An AGC circuit includes: a variable gain amplifier circuit having a gain controlled with a gain control signal; a rectifier circuit for rectifying an output signal of the variable gain amplifier circuit; a voltage comparator for comparing a rectified signal with a threshold voltage; an up/down counter that switches between up-counting and down-counting according to the level of an output voltage of the voltage comparator; and a D/A converter circuit for outputting a voltage corresponding to a count value of the up/down counter. The gain control signal supplied to the variable gain amplifier circuit corresponds to the voltage output from the D/A converter circuit, and the threshold voltage for the voltage comparator is a voltage corresponding to the voltage output from the D/A converter circuit.

    AGC circuit
    5.
    发明申请
    AGC circuit 有权
    AGC电路

    公开(公告)号:US20080074185A1

    公开(公告)日:2008-03-27

    申请号:US11980448

    申请日:2007-10-31

    Applicant: Takuma Ishida

    Inventor: Takuma Ishida

    CPC classification number: H03G3/3026

    Abstract: An AGC circuit includes: a variable gain amplifier circuit having a gain controlled with a gain control signal; a rectifier circuit for rectifying an output signal of the variable gain amplifier circuit; a voltage comparator for comparing a rectified signal with a threshold voltage; an up/down counter that switches between up-counting and down-counting according to the level of an output voltage of the voltage comparator; and a D/A converter circuit for outputting a voltage corresponding to a count value of the up/down counter. The gain control signal supplied to the variable gain amplifier circuit corresponds to the voltage output from the D/A converter circuit, and the threshold voltage for the voltage comparator is a voltage corresponding to the voltage output from the D/A converter circuit.

    Abstract translation: AGC电路包括:具有由增益控制信号控制的增益的可变增益放大器电路; 整流电路,用于对可变增益放大器电路的输出信号进行整流; 电压比较器,用于将整流信号与阈值电压进行比较; 一个向上/向下计数器,根据电压比较器的输出电压的电平,在递增计数和递减计数之间切换; 以及用于输出与上下计数器的计数值对应的电压的D / A转换电路。 提供给可变增益放大器电路的增益控制信号对应于从D / A转换器电路输出的电压,并且电压比较器的阈值电压是对应于从D / A转换器电路输出的电压的电压。

    SPEAKER PROTECTION CIRCUIT
    6.
    发明申请
    SPEAKER PROTECTION CIRCUIT 审中-公开
    扬声器保护电路

    公开(公告)号:US20070064953A1

    公开(公告)日:2007-03-22

    申请号:US11533540

    申请日:2006-09-20

    Abstract: This speaker protection circuit includes: a voltage comparator that compares a voltage of a reference bias terminal of an amplifying circuit constituting a BTL amplifying device with a preset threshold voltage; and first and second switches for switching between a mode of supplying an electric current to each of two power amplifying circuits and a mode of cutting off the electric current. When the voltage of the reference bias terminal is lower than the threshold voltage, based on an output level of the voltage comparator, at least one of the first and second switches is turned off to cut off a current supply to each of the power amplifying circuits so that driving of a speaker by the power amplifying circuits is halted. Thus, it is possible to suppress, using a relatively simple configuration, an offset current generated in a speaker due to an abnormality of the voltage of a reference bias terminal.

    Abstract translation: 该扬声器保护电路包括:电压比较器,其将构成BTL放大装置的放大电路的基准偏置端子的电压与预设的阈值电压进行比较; 以及用于在向两个功率放大电路中的每一个提供电流的模式和切断电流的模式之间切换的第一和第二开关。 当参考偏置端子的电压低于阈值电压时,基于电压比较器的输出电平,第一和第二开关中的至少一个被截止以截断每个功率放大电路的电流供应 从而停止由功率放大电路驱动扬声器。 因此,可以使用相对简单的配置来抑制由于参考偏置端子的电压的异常而在扬声器中产生的偏移电流。

    AGC circuit
    7.
    发明授权
    AGC circuit 失效
    AGC电路

    公开(公告)号:US07015759B2

    公开(公告)日:2006-03-21

    申请号:US10899006

    申请日:2004-07-27

    CPC classification number: H03G3/001 H03G3/3026

    Abstract: An AGC circuit of the present invention includes a first up/down counter for converting the amount of change in an output voltage higher than a threshold voltage into a count value and controlling a gain of a variable gain amplifier circuit and a second up/down counter to which a reference clock having a lower frequency than that of a reference clock supplied to the first up/down counter is supplied. Count values of the first and second up/down counters are D/A-converted and then compared with each other by a voltage comparator. An up/down count of the first up/down counter is controlled based on a comparison result and the gain of the variable gain amplifier circuit is controlled using only a signal based on the count value of the first up/down counter, thereby suppressing distortion of an output waveform and the generation of a frequency signal which is not originally input.

    Abstract translation: 本发明的AGC电路包括:第一上/下计数器,用于将高于阈值电压的输出电压的变化量转换成计数值,并控制可变增益放大器电路和第二上/下计数器的增益 提供具有比提供给第一向上/向下计数器的参考时钟低的参考时钟的参考时钟。 第一和第二上/下计数器的计数值进行D / A转换,然后通过电压比较器进行比较。 基于比较结果控制第一向上/向下计数器的向上/向下计数,并且仅使用基于第一向上/向下计数器的计数值的信号来控制可变增益放大器电路的增益,由此抑制失真 的输出波形和不是最初输入的频率信号的产生。

    AGC circuit
    8.
    发明授权
    AGC circuit 失效
    AGC电路

    公开(公告)号:US06977550B2

    公开(公告)日:2005-12-20

    申请号:US10713274

    申请日:2003-11-17

    CPC classification number: H03G3/3036

    Abstract: An AGC circuit, which does not require any signal integration circuit comprised of a capacitor and a resistor, is provided. To achieve the above object, when amplifying or attenuating input signal by a variable gain control circuit controlled by the gain control voltage, output signal of the variable gain amplifier circuit is rectified by a rectification circuit, the output signal of the rectification circuit is compared to an arbitrary set voltage by a voltage comparator. The up-count operation and the down-count operation of the up/down counter is controlled to changeover by the output signal of the voltage comparator, and a voltage corresponding to the count value of the up/down counter is output from the D/A conversion circuit. Thus, gain control voltage corresponding to the voltage output from the D/A conversion circuit is supplied to the variable gain amplifier circuit.

    Abstract translation: 提供了不需要由电容器和电阻器组成的任何信号积分电路的AGC电路。 为了实现上述目的,当通过由增益控制电压控制的可变增益控制电路放大或衰减输入信号时,可变增益放大器电路的输出信号由整流电路整流,将整流电路的输出信号与 通过电压比较器的任意设定电压。 上升计数器的递增计数操作和递减计数操作被控制以通过电压比较器的输出信号切换,并且与D / D计数器的计数值对应的电压从D / A转换电路。 因此,与D / A转换电路输出的电压相对应的增益控制电压被提供给可变增益放大器电路。

    Automatic gain control circuit
    9.
    发明授权
    Automatic gain control circuit 失效
    自动增益控制电路

    公开(公告)号:US07595692B2

    公开(公告)日:2009-09-29

    申请号:US12042860

    申请日:2008-03-05

    Applicant: Takuma Ishida

    Inventor: Takuma Ishida

    CPC classification number: H03G3/3026 H03G1/0088

    Abstract: An automatic gain control circuit for controlling the gain of a variable gain amplifier block includes a count control signal generating block, an up-down counter, a gain control signal generating block, and a downcount clock signal generating block. The up-down counter upcounts an upcount clock signal or downcounts a downcount clock signal according to a count control signal generated by the count control signal generating block. The gain control signal generating block generates a gain control signal corresponding to a count value of the up-down counter. The downcount clock signal generating block generates a downcount clock signal whose frequency corresponds to the count value of the up-down counter.

    Abstract translation: 用于控制可变增益放大器块的增益的自动增益控制电路包括计数控制信号生成块,升降计数器,增益控制信号生成块和下计数时钟信号生成块。 上计数器向上计数上计数时钟信号,或者根据由计数控制信号产生块产生的计数控制信号计数下计数时钟信号。 增益控制信号生成块生成与上下计数器的计数值对应的增益控制信号。 下计数时钟信号产生块产生一个下降计数时钟信号,其频率对应于升降计数器的计数值。

    AUTOMATIC GAIN CONTROL CIRCUIT
    10.
    发明申请
    AUTOMATIC GAIN CONTROL CIRCUIT 失效
    自动增益控制电路

    公开(公告)号:US20080218268A1

    公开(公告)日:2008-09-11

    申请号:US12042860

    申请日:2008-03-05

    Applicant: Takuma Ishida

    Inventor: Takuma Ishida

    CPC classification number: H03G3/3026 H03G1/0088

    Abstract: An automatic gain control circuit for controlling the gain of a variable gain amplifier block includes a count control signal generating block, an up-down counter, a gain control signal generating block, and a downcount clock signal generating block. The up-down counter upcounts an upcount clock signal or downcounts a downcount clock signal according to a count control signal generated by the count control signal generating block. The gain control signal generating block generates a gain control signal corresponding to a count value of the up-down counter. The downcount clock signal generating block generates a downcount clock signal whose frequency corresponds to the count value of the up-down counter.

    Abstract translation: 用于控制可变增益放大器块的增益的自动增益控制电路包括计数控制信号生成块,升降计数器,增益控制信号生成块和下计数时钟信号生成块。 上计数器向上计数上计数时钟信号,或者根据由计数控制信号产生块产生的计数控制信号计数下计数时钟信号。 增益控制信号生成块生成与上下计数器的计数值对应的增益控制信号。 下计数时钟信号产生块产生一个下降计数时钟信号,其频率对应于升降计数器的计数值。

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