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公开(公告)号：US5418818A
公开(公告)日：1995-05-23
申请号：US950241
申请日：1992-09-22
申请人： Robert F. Marchetto , Todd A. Stewart , Paul A. Goud , David W. Kroeger , Charles B. Cox , Timothy J. Linderer , Richard J. Hinkle , Robert J. Shade
发明人： Robert F. Marchetto , Todd A. Stewart , Paul A. Goud , David W. Kroeger , Charles B. Cox , Timothy J. Linderer , Richard J. Hinkle , Robert J. Shade
CPC分类号： H03C1/00
摘要： A digital exciter (30) for selectively modulating digital or analog input data. The digital exciter includes a digital signal modulator (32) and a digital quadrature modulator (DQM)(36) comprising two digital signal processors (DSPs). The signal modulator is controlled by a control (40). An operator can selectively determine whether the digital exciter is used for modulating either two level or four level NRZ digital data and whether the device is to provide linear modulation or frequency modulation (FM) of the input signal. An interpolator (38) interpolates a 662/3 kHz timer interrupt rate used in the signal modulator to a 400 kHz rate, thereby reducing the processing load on the DSP comprising the DQM by simplifying the sine and cosine values used in the quadrature modulation. An operator can select from among a plurality of operating parameters on a menu for controlling the signal modulator, either from a local or a remote video display terminal (VDT).
摘要翻译： 一种用于选择性地调制数字或模拟输入数据的数字激励器（30）。 数字激励器包括数字信号调制器（32）和包括两个数字信号处理器（DSP）的数字正交调制器（DQM）（36）。 信号调制器由控制器（40）控制。 操作者可以选择性地确定数字激励器是用于调制两级或四级NRZ数字数据以及该装置是否提供输入信号的线性调制或调频（FM）。 内插器（38）将在信号调制器中使用的662 / 3kHz定时器中断速率内插到400kHz速率，从而通过简化在正交调制中使用的正弦和余弦值来减少包括DQM的DSP的处理负载。 操作员可以从用于从本地或远程视频显示终端（VDT）控制信号调制器的菜单上的多个操作参数中进行选择。
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公开(公告)号：US5414734A
公开(公告)日：1995-05-09
申请号：US1061
申请日：1993-01-06
CPC分类号： H04B7/005
摘要： A method and apparatus for compensating fading and interference in a radio signal. A plurality of pilot symbols are appended to a plurality of data symbols to form successive frames that are modulated at a transmitter. The transmitted modulated signal is subject to loss of data due to simple fading and multi-path and simulcast interference. The received signals are demodulated by a receiver and processed to provide a data signal comprising the data symbols and a pilot signal comprising the pilot symbols. The data signal is delayed for sufficient time to enable channel impulse response estimates to be made of successive blocks of pilot symbols, preferably using pilot symbol blocks that both precede and follow the data symbols in the frame being processed. The channel impulse response estimates for blocks of pilot symbols are buffered and used by an interpolator to determine an interpolated channel impulse response estimate for each data symbol as a function of both the pilot symbols and of predefined channel characteristics. The interpolated channel impulse response estimates are applied to successive data symbols in the delayed data signal, enabling the data to be decoded, compensating for fading and interference. Interpolation using predefined channel characteristics based on worst case conditions substantially improves the bit error rate (BER) for the data recovered, compared to the prior art.
摘要翻译： 一种用于补偿无线电信号中的衰落和干扰的方法和装置。 多个导频符号附加到多个数据符号以形成在发射机处被调制的连续帧。 传输的调制信号由于简单的衰落和多径和同播干扰而遭受数据丢失。 所接收的信号由接收机解调并被处理以提供包括数据符号的数据信号和包括导频符号的导频信号。 数据信号被延迟足够的时间以使信道脉冲响应估计值能够由连续的导频符号块进行，优选地使用在正被处理的帧中的数据符号之前和之后的导频符号块。 导频符号块的信道脉冲响应估计被缓冲并由内插器使用，以确定作为导频符号和预定义信道特性的函数的每个数据符号的内插信道脉冲响应估计。 内插信道脉冲响应估计被应用于延迟数据信号中的连续数据符号，使数据能被解码，补偿衰落和干扰。 与现有技术相比，使用基于最坏情况条件的预定义信道特征的插值实质上提高了恢复数据的误比特率（BER）。
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3.发明授权High performance modem using pilot symbols for equalization and frame synchronization 失效高性能调制解调器使用导频符号进行均衡和帧同步
公开(公告)号：US5666378A
公开(公告)日：1997-09-09
申请号：US215129
申请日：1994-03-18
CPC分类号： H04H20/67 , H04L1/0041 , H04L1/0045 , H04L1/0057 , H04L1/006 , H04L1/241 , H04L1/242 , H04L27/34 , H04L27/3416 , H04L7/041 , H04L7/043 , H04L7/0083 , H04L7/046
摘要： A modulator that modulates and encodes data using data symbols, interspersed with pilot symbols, for transmission to another modem, and a demodulator that decodes data symbols of a signal received from another modem. In the demodulator, a received signal is sampled at four times the symbol rate. The sampled signal is converted to quadrature signals and low-pass filtered to produce a complex baseband signal. Data symbols in the complex baseband signal are sampled in synchronization with the start of each symbol based on the pilot symbols that are interspersed in the signal. By processing the pilot symbols, full modem synchronization is maintained down to a very low signal-to-noise ratio, through noise bursts, or even when the data symbols representing data are replaced by predefined sequences of data symbols that convey the dots and dashes of Morse code identifying the station transmitting the modulated signal. The continued presence of pilot symbols interspersed with the sequences of data symbols conveying Morse code prevents loss of synchronization between the transmitting station and the receiving station. The pilot symbols are also used to update equalizer tap coefficients in an equalizer of the demodulator, thereby minimizing errors in the output data caused by channel fading, noise, and other effects. In addition, the sequence of pilot symbols is used to delimit data frames, so that bit synchronization and frame synchronization in the data are not required.
摘要翻译： 使用散布有导频符号的数据符号来调制和编码数据的调制器，用于传输到另一个调制解调器，以及解调器，其解码从另一个调制解调器接收的信号的数据符号。 在解调器中，以符号率的四倍采样接收信号。 采样信号被转换成正交信号，低通滤波以产生复基带信号。 基于散布在信号中的导频符号，复数基带信号中的数据符号与每个符号的开始同步地采样。 通过处理导频符号，完全调制解调器同步通过噪声突发维持到非常低的信噪比，或者甚至当代表数据的数据符号被传送数据符号的预定义序列代替时 莫尔斯电码识别发射调制信号的电台。 继续存在散布有传送莫尔斯电码的数据符号序列的导频符号防止发射台与接收台之间的同步丢失。 导频符号还用于更新解调器的均衡器中的均衡器抽头系数，从而最小化由信道衰落，噪声和其他影响引起的输出数据中的误差。 另外，使用导频符号序列来定界数据帧，从而不需要数据中的位同步和帧同步。
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公开(公告)号：US5243299A
公开(公告)日：1993-09-07
申请号：US968038
申请日：1992-10-28
IPC分类号： H04L27/156
CPC分类号： H04L27/1566
摘要： A modem for use in a simulcast paging system includes a modulator (26) and a demodulator (30), both of which produce very low jitter, enabling the modem to be used at data rates well in excess of 1,200 baud. Both the modulator and the demodulator are implemented in software using a digital signal processor (DSP) (66). The modulator initially samples a non-return-to-zero (NRZ) input at a sample rate of 19.2 KHz, interpolates transitions between logic levels, and produces a frequency shift keyed (FSK) modulated signal at a center frequency different than that used for transmitting the modulated signal. Using an interpolation timer that responds to changes in logic level on the input, the modulator changes the frequency of the FSK modulated signal at the appropriate time with much greater accuracy than would be possible without interpolation. The FSK modulated signal is filtered to substantially attenuate frequencies outside a 3 KHz bandwidth, producing a filtered signal. By frequency shifting the filtered signal (either up or down) to a center frequency of approximately 1,700 Hz, interference between positive and negative frequencies is substantially eliminated. A digital-to-analog converter (DAC) (74) produces an analog FSK modulated signal. At a receiving modem (29), the demodulator digitizes the FSK modulated signal at a 19.2 KHz sample rate and shifts the digitized modulated signal to a center frequency of 0 Hz, producing a complex baseband comprising in-phase (real) and quadrature (imaginary) components. The DSP determines the instantaneous phase of the complex baseband signal, and from the time derivative of the instantaneous phase, determines its frequency. The instantaneous frequency is interpolated at eight times the major sample rate, producing an interpolated frequency signal so that changes in the sign of the interpolated frequency can be used to determine the logic level and zero crossing of the demodulated signal with greater resolution, substantially reducing jitter. Correlation of the demodulated signal at the data rate further reduces jitter.
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5.发明授权
公开(公告)号：US5473638A
公开(公告)日：1995-12-05
申请号：US1318
申请日：1993-01-06
CPC分类号： H04H20/67
摘要： A method and apparatus provide an equalization time delay to synchronize a plurality of paging transmitters in a simulcast paging system. A delay equalization circuit (41 ) appropriate for use with an analog input signal includes a coder/decoder (CODEC) (50) and a digital signal processor (DSP) (58). An analog input signal is digitized or sampled by an analog-to-digital converter (ADC) in the CODEC, producing corresponding digital values that are input to the DSP. The DSP employs a selected finite impulse filter to interpolate between the sampled digital values from the CODEC to provide enhanced resolution in delaying a signal output that is output. The DSP determines a major sample index and an interpolated filter index to achieve the desired equalization time delay. These variables define two delay intervals that are combined to provide the required equalization time delay. As each sampled digital value is produced, the delayed value is output and converted by a digital-to-analog converter (DAC) 54 in the CODEC to an analog signal having the corresponding required delay. By thus providing the appropriate equalization time delay to the signal transmitted by each paging transmitter in a simulcast paging system 20, differences in the time required for the analog signal to propagate from a paging terminal to each paging transmitter are compensated, thereby substantially eliminating phase interference in overlap zones of the paging transmitters.
摘要翻译： 一种方法和装置提供均衡时间延迟以同步联播寻呼系统中的多个寻呼发射机。 适用于模拟输入信号的延迟均衡电路（41）包括编码器/解码器（CODEC）（50）和数字信号处理器（DSP）（58）。 模拟输入信号由CODEC中的模数转换器（ADC）数字化或采样，产生输入到DSP的相应数字值。 DSP使用选定的有限脉冲滤波器在来自CODEC的采样数字值之间插值，以在延迟输出的信号输出时提供增强的分辨率。 DSP确定主要采样索引和内插滤波器索引以实现所需的均衡时间延迟。 这些变量定义了两个延迟间隔，它们被组合以提供所需的均衡时间延迟。 当产生每个采样的数字值时，延迟值由CODEC中的数模转换器（DAC）54输出并转换为具有相应的所需延迟的模拟信号。 通过在同播寻呼系统20中为每个寻呼发射机发送的信号提供适当的均衡时间延迟，模拟信号从寻呼终端传播到每个寻呼发射机所需的时间差被补偿，从而基本消除了相位干扰 在寻呼发射机的重叠区域。
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公开(公告)号：US5227741A
公开(公告)日：1993-07-13
申请号：US823842
申请日：1992-01-22
IPC分类号： H04H20/67 , H04L25/38 , H04L27/12 , H04L27/152
CPC分类号： H04H20/67 , H04L25/38 , H04L27/12 , H04L27/1525
摘要： A modem for use in a simulcast paging system includes a modulator (26) and a demodulator (30), both of which produce very low jitter, enabling the modem to be used at data rates well in excess of 1,200 baud. Both the modulator and the demodulator are implemented in software using a digital signal processor (DSP) (66). The modulator initially samples a non-return-to-zero (NRZ) input at a sample rate of 19.2 KHz, interpolates transitions between logic levels, and produces a frequency shift keyed (FSK) modulated signal at a center frequency different than that used for transmitting the modulated signal. Using an interpolation timer that responds to changes in logic level on the input, the modulator changes the frequency of the FSK modulated signal at the appropriate time with much greater accuracy than would be possible without interpolation. The FSK modulated signal is filtered to substantially attenuate frequencies outside a 3 KHz bandwidth, producing a filtered signal. By frequency shifting the filtered signal (either up or down) to a center frequency of approximately 1,700 Hz, interference between positive and negative frequencies is substantially eliminated. A digital-to-analog converter (DAC) (74) produces an analog FSK modulated signal. At a receiving modem (29), the demodulator digitizes the FSK modulated signal at a 19.2 KHz sample rate and shifts the digitized modulated signal to a center frequency of 0 Hz, producing a complex baseband comprising in-phase (real) and quadrature (imaginary) components. The DSP determines the instantaneous phase of the complex baseband signal, and from the time derivative of the instantaneous phase, determines its frequency. The instantaneous frequency is interpolated at eight times the major sample rate, producing an interpolated frequency signal so that changes in the sign of the interpolated frequency can be used to determine the logic level and zero crossing of the demodulated signal with greater resolution, substantially reducing jitter. Correlation of the demodulated signal at the data rate further reduces jitter.
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公开(公告)号：US5787133A
公开(公告)日：1998-07-28
申请号：US474332
申请日：1995-06-07
CPC分类号： H04H20/67 , H04L1/0041 , H04L1/0045 , H04L1/0057 , H04L1/006 , H04L1/241 , H04L1/242 , H04L27/34 , H04L27/3416 , H04L7/041 , H04L7/043 , H04L7/0083 , H04L7/046
摘要： A modulator that modulates and encodes data using data symbols, interspersed with pilot symbols, for transmission to another modem, and a demodulator that decodes data symbols of a signal received from another modem. In the demodulator, a received signal is sampled at four times the symbol rate. The sampled signal is converted to quadrature signals and low-pass filtered to produce a complex baseband signal. Data symbols in the complex baseband signal are sampled in synchronization with the start of each symbol based on the pilot symbols that are interspersed in the signal. By processing the pilot symbols, full modem synchronization is maintained down to a very low signal-to-noise ratio, through noise bursts, or even when the data symbols representing data are replaced by predefined sequences of data symbols that convey the dots and dashes of Morse code identifying the station transmitting the modulated signal. The continued presence of pilot symbols interspersed with the sequences of data symbols conveying Morse code prevents loss of synchronization between the transmitting station and the receiving station. The pilot symbols are also used to update equalizer tap coefficients in an equalizer of the demodulator, thereby minimizing errors in the output data caused by channel fading, noise, and other effects. In addition, the sequence of pilot symbols is used to delimit data frames, so that bit synchronization and frame synchronization in the data are not required.
摘要翻译： 使用散布有导频符号的数据符号来调制和编码数据的调制器，用于传输到另一个调制解调器，以及解调器，其解码从另一个调制解调器接收的信号的数据符号。 在解调器中，以符号率的四倍采样接收信号。 采样信号被转换成正交信号，低通滤波以产生复基带信号。 基于散布在信号中的导频符号，复数基带信号中的数据符号与每个符号的开始同步地采样。 通过处理导频符号，完全调制解调器同步通过噪声突发维持到非常低的信噪比，或者甚至当代表数据的数据符号被传送数据符号的预定义序列代替时 莫尔斯电码识别发射调制信号的电台。 继续存在散布有传送莫尔斯电码的数据符号序列的导频符号防止发射台与接收台之间的同步丢失。 导频符号还用于更新解调器的均衡器中的均衡器抽头系数，从而最小化由信道衰落，噪声和其他影响引起的输出数据中的误差。 另外，使用导频符号序列来定界数据帧，从而不需要数据中的位同步和帧同步。
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公开(公告)号：US5513215A
公开(公告)日：1996-04-30
申请号：US124155
申请日：1993-09-20
申请人： Robert F. Marchetto , Todd A. Stewart , Paul K. Ho
发明人： Robert F. Marchetto , Todd A. Stewart , Paul K. Ho
CPC分类号： H04H20/67
摘要： In a simulcast communication system, a method and apparatus for compensating differences in propagation time, lack of synchronization in transmitters, and multipath fading to recover data transmitted to a receiving device. In a simulcast communication system(26) that comprises a plurality of transmitters (32), a receiver (36) includes a digital signal processor (DSP) (86) that processes a demodulated received signal to adaptively compensate for changes in the channel through which a multipath signal is propagated from the transmitters to the receiver. In one embodiment, the DSP comprises a decision feedback equalizer. An error signal is produced by the equalizer through a comparison of the estimated symbols with symbols most likely transmitted, for use in updating filter coefficients used by the equalizer in processing the received signal. Alternatively, in a linear adaptive equalizer, reference or pilot symbols transmitted with the data symbols are used to determine the error signal. Another embodiment implements a Viterbi algorithm to make decisions of the most likely data symbols in response to estimates of the channel impulse response. Further, a hybrid embodiment combines the Viterbi decoder with a bi-directional decision feedback equalizer that produces forward and reverse estimates of the sequence of data symbols. The Viterbi decoder selects between the forward and reverse sequences based upon channel impulse response estimates to dynamically compensate for varying channel conditions. Using any one of these embodiments, a linear modulated signal can be decoded to recover the data transmitted, even though the received signal has been degraded by propagation in a multipath fading channel. The same techniques are also disclosed as applicable to constant envelope modulated transmissions in a simulcast system.
摘要翻译： 在联播通信系统中，用于补偿传播时间差异，发射机中的同步缺乏以及多径衰落以恢复发送到接收设备的数据的方法和装置。 在包括多个发射机（32）的联播通信系统（26）中，接收机（36）包括数字信号处理器（DSP）（86），其处理解调的接收信号以自适应地补偿通道中的变化 多径信号从发射机传播到接收机。 在一个实施例中，DSP包括判决反馈均衡器。 均衡器通过将估计符号与最可能发送的符号进行比较来产生误差信号，用于在处理接收信号时用于更新均衡器使用的滤波器系数。 或者，在线性自适应均衡器中，使用数据符号发送的参考或导频符号来确定误差信号。 另一个实施例实现维特比算法，以响应于信道脉冲响应的估计来做出最可能的数据符号的决定。 此外，混合实施例将维特比解码器与产生数据符号序列的正向和反向估计的双向判决反馈均衡器组合。 维特比解码器基于信道脉冲响应估计在正向和反向序列之间进行选择，以动态地补偿不同的信道条件。 使用这些实施例中的任何一个，线性调制信号可被解码以恢复发送的数据，即使接收的信号已被多径衰落信道中的传播降级。 同样的技术也被公开适用于同时播送系统中的恒定包络调制传输。
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