公开(公告)号：US20050223292A1

公开(公告)日：2005-10-06

申请号：US10781371

申请日：2004-02-17

申请人： Chee Lee ,  Vui Liew ,  Mikal Hunsaker ,  Michael Derr

发明人： Chee Lee ,  Vui Liew ,  Mikal Hunsaker ,  Michael Derr

IPC分类号： G06F11/00

CPC分类号： G06F8/60

摘要： A patch mechanism is described, which can be used to detect and workaround defects and conditions existing in an integrated circuit chip. The patch mechanism includes a trigger-matching logic incorporated within an integrated circuit chip to capture an incoming request cycle and determine if the captured incoming cycle matches one or more of trigger conditions. The patch mechanism further includes a control logic coupled to the trigger-matching logic to select a set of instructions upon detection of at least one matched trigger condition and to execute operations corresponding to the selected set of instructions. The control logic is configured to select the set of instructions based on the at least one matched trigger condition.

摘要翻译： 描述了一种补丁机制，可用于检测和解决集成电路芯片中存在的缺陷和状况。 补丁机制包括一个集成在集成电路芯片内的触发器匹配逻辑，以捕获进入的请求周期并确定捕获的进入周期是否匹配一个或多个触发条件。 补丁机制还包括耦合到触发匹配逻辑的控制逻辑，以在检测到至少一个匹配的触发条件时选择一组指令，并执行与所选指令集相对应的操作。 所述控制逻辑被配置为基于所述至少一个匹配的触发条件来选择所述指令集。

公开(公告)号：US20050289278A1

公开(公告)日：2005-12-29

申请号：US10877560

申请日：2004-06-24

申请人： Thian Tan ,  Vui Liew ,  Mikal Hunsaker

发明人： Thian Tan ,  Vui Liew ,  Mikal Hunsaker

IPC分类号： G06F13/00 ,  G06F13/40

CPC分类号： G06F13/4027 ,  G06F2213/0026

摘要： Method and apparatus for programmable completion tracking logic to support multiple virtual channels. In one embodiment, the apparatus includes a controller having the programmable completion tracking logic for supporting multiple virtual channels. In one embodiment, a completion tracking queue is programmable to provide a predetermined number of entries to store upstream non-posted (NP) read request information corresponding to a virtual channel from a plurality of virtual channels supported by the controller. In one embodiment, the predetermined number of entries are shared among the plurality of virtual channels according to a minimum entry value and a maximum entry value defined for each respective virtual channel. Other embodiments are described and claimed.

摘要翻译： 用于可编程完成跟踪逻辑以支持多个虚拟通道的方法和装置。 在一个实施例中，该装置包括具有用于支持多个虚拟通道的可编程完成跟踪逻辑的控制器。 在一个实施例中，完成跟踪队列是可编程的，以提供预定数量的条目以存储来自由控制器支持的多个虚拟通道对应于虚拟通道的上游非发布（NP）读取请求信息。 在一个实施例中，根据为每个相应虚拟频道定义的最小入口值和最大入口值，在多个虚拟信道中共享预定数量的条目。 描述和要求保护其他实施例。

公开(公告)号：US20050182869A1

公开(公告)日：2005-08-18

申请号：US10781512

申请日：2004-02-17

申请人： Chee Lee ,  Vui Liew ,  Mikal Hunsaker ,  Michael Derr

发明人： Chee Lee ,  Vui Liew ,  Mikal Hunsaker ,  Michael Derr

IPC分类号： G06F3/00

CPC分类号： G06F12/0638

摘要： A system is described for providing a patch mechanism within an input/output (I/O) controller, which can be used to workaround defects and conditions existing in the I/O controller. The system includes a patch module coupled to a completion queue included in the I/O controller. The patch module is used to sample incoming cycles received by the I/O controller and to determine if the captured incoming cycle matches one or more of preprogrammed trigger conditions. The patch module is capable of working around a captured non-posted request cycle by controlling header information loaded into the completion queue and by instructing the completion queue whether or not to discard a completion received from a designated end-device.

摘要翻译： 描述了一种系统，用于在输入/输出（I / O）控制器内提供补丁机制，可用于解决I / O控制器中存在的缺陷和状况。 该系统包括耦合到包括在I / O控制器中的完成队列的补丁模块。 补丁模块用于对I / O控制器接收的进入周期进行采样，并确定捕获的进入周期是否匹配一个或多个预编程触发条件。 补丁模块能够通过控制加载到完成队列中的头信息并通过指示完成队列来确定是否丢弃从指定的终端设备接收到的完成，来围绕捕获的非发布请求周期进行操作。