Semiconductor resistive random access memory device suitable for bipolar action
    2.
    发明授权
    Semiconductor resistive random access memory device suitable for bipolar action 有权
    半导体电阻随机存取存储器件适用于双极作用

    公开(公告)号:US08481989B2

    公开(公告)日:2013-07-09

    申请号:US13094278

    申请日:2011-04-26

    IPC分类号: H01L29/02

    摘要: According to one embodiment, a semiconductor memory device includes a word line interconnect layer, a bit line interconnect layer and a pillar. The word line interconnect layer includes a plurality of word lines extending in a first direction. The bit line interconnect layer includes a plurality of bit lines extending in a second direction intersecting with the first direction. The pillar is disposed between each of the word lines and each of the bit lines. The pillar has a selector stacked film containing silicon, and a variable resistance film disposed on a side of the word lines or the bit lines. The selector stacked film has a different component-containing layer. The different component-containing layer is formed at one position in a region excluding ends on the sides of the word and bit lines, and contains a 14 group element having a larger atomic radius than an atomic radius of silicon.

    摘要翻译: 根据一个实施例,半导体存储器件包括字线互连层,位线互连层和柱。 字线互连层包括沿第一方向延伸的多个字线。 位线互连层包括沿与第一方向相交的第二方向延伸的多个位线。 支柱设置在每个字线和每个位线之间。 支柱具有包含硅的选择器叠层膜,以及设置在字线或位线侧的可变电阻膜。 选择器层叠膜具有不同的含有成分的层。 含有不同成分的层形成在除了字和位线的侧面之外的端部的区域的一个位置处,并且包含具有比原子半径大的原子半径的14组元素。

    SEMICONDUCTOR MEMORY DEVICE
    3.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 有权
    半导体存储器件

    公开(公告)号:US20110291063A1

    公开(公告)日:2011-12-01

    申请号:US13094278

    申请日:2011-04-26

    IPC分类号: H01L45/00

    摘要: According to one embodiment, a semiconductor memory device includes a word line interconnect layer, a bit line interconnect layer and a pillar. The word line interconnect layer includes a plurality of word lines extending in a first direction. The bit line interconnect layer includes a plurality of bit lines extending in a second direction intersecting with the first direction. The pillar is disposed between each of the word lines and each of the bit lines. The pillar has a selector stacked film containing silicon, and a variable resistance film disposed on a side of the word lines or the bit lines. The selector stacked film has a different component-containing layer. The different component-containing layer is formed at one position in a region excluding ends on the sides of the word and bit lines, and contains a 14 group element having a larger atomic radius than an atomic radius of silicon.

    摘要翻译: 根据一个实施例,半导体存储器件包括字线互连层,位线互连层和柱。 字线互连层包括沿第一方向延伸的多个字线。 位线互连层包括沿与第一方向相交的第二方向延伸的多个位线。 支柱设置在每个字线和每个位线之间。 支柱具有包含硅的选择器叠层膜,以及设置在字线或位线侧的可变电阻膜。 选择器层叠膜具有不同的含有成分的层。 含有不同成分的层形成在除了字和位线的侧面之外的端部的区域的一个位置处,并且包含具有比原子半径大的原子半径的14组元素。