Anisotropic nitride etch process with high selectivity to oxide and photoresist layers in a damascene etch scheme
    1.
    发明授权
    Anisotropic nitride etch process with high selectivity to oxide and photoresist layers in a damascene etch scheme 失效
    各向异性氮化物蚀刻工艺,在镶嵌蚀刻方案中对氧化物和光致抗蚀剂层具有高选择性

    公开(公告)号:US06461529B1

    公开(公告)日:2002-10-08

    申请号:US09299137

    申请日:1999-04-26

    IPC分类号: H01L213215

    摘要: A process and etchant gas composition for anisotropically etching a trench in a silicon nitride layer of a multilayer structure. The etchant gas composition has an etchant gas including a polymerizing agent, a hydrogen source, an oxidant, and a noble gas diluent. The oxidant preferably includes a carbon-containing oxidant component and an oxidant-noble gas component. The fluorocarbon gas is selected from CF4, C2F6, and C3F8; the hydrogen source is selected from CHF3, CH2F2, CH3F, and H2; the oxidant is selected from CO, CO2, and O2; and the noble gas diluent is selected from He, Ar, and Ne. The constituents are added in amounts to achieve an etchant gas having a high nitride selectivity to silicon oxide and photoresist. A power source, such as an RF power source, is applied to the structure to control the directionality of the high density plasma formed by exciting the etchant gas. The power source that controls the directionality of the plasma is decoupled from the power source used to excite the etchant gas. The etchant gas can be used during a nitride etch step in a process for making a metal oxide semiconductor field effect transistor.

    摘要翻译: 一种用于各向异性蚀刻多层结构的氮化硅层中的沟槽的工艺和蚀刻剂气体组合物。 蚀刻剂气体组合物具有包括聚合剂,氢源,氧化剂和惰性气体稀释剂的蚀刻剂气体。 氧化剂优选包括含碳氧化剂组分和氧化剂 - 惰性气体组分。 碳氟化合物气体选自CF4,C2F6和C3F8; 氢源选自CHF 3,CH 2 F 2,CH 3 F和H 2; 氧化剂选自CO,CO 2和O 2; 惰性气体稀释剂选自He,Ar和Ne。 添加成分以达到对氧化硅和光致抗蚀剂具有高氮化物选择性的蚀刻剂气体。 将诸如RF电源的电源施加到结构以控制通过激发蚀刻剂气体形成的高密度等离子体的方向性。 控制等离子体方向性的电源与用于激发蚀刻剂气体的电源脱耦。 在制造金属氧化物半导体场效应晶体管的工艺中的氮化物蚀刻步骤期间可以使用蚀刻剂气体。

    Reactive ion etch loading measurement technique
    3.
    发明授权
    Reactive ion etch loading measurement technique 失效
    反应离子蚀刻加载测量技术

    公开(公告)号:US06268226B1

    公开(公告)日:2001-07-31

    申请号:US09345647

    申请日:1999-06-30

    IPC分类号: H01L2100

    摘要: A process for estimating a critical dimension of a trench formed by etching a substrate. First, a regression model is constructed for estimating the critical dimension, in which principal component loadings and principal component scores are also calculated. Next, a substrate is etched and spectral data of the etching are collected. A new principal component score is then calculated using the spectral data and the principal component loadings. Finally, the critical dimension of the trench is estimated by applying the new principal component score to the regression model.

    摘要翻译: 用于估计通过蚀刻衬底形成的沟槽的临界尺寸的方法。 首先,构建了一个回归模型,用于估计临界尺寸,其中还计算主成分负荷和主成分分数。 接下来,蚀刻基板并收集蚀刻的光谱数据。 然后使用光谱数据和主要分量负载来计算新的主分量分数。 最后,通过将新的主成分分数应用于回归模型来估计沟槽的关键尺度。

    Silicon sidewall etching
    4.
    发明授权
    Silicon sidewall etching 失效
    硅壁蚀刻

    公开(公告)号:US5895273A

    公开(公告)日:1999-04-20

    申请号:US883762

    申请日:1997-06-27

    IPC分类号: H01L21/3065 H01L21/00

    CPC分类号: H01L21/3065

    摘要: Decoupled plasma etching process used to make a protruding structure having vertical or near vertical sidewalls. The decoupled plasma etching process comprises the following steps:forming a mask on top of a semiconductor substrate defining the lateral size of the protruding structures to be formed in said substrate,feeding HCl, Cl.sub.2 and N.sub.2 into a plasma chamber to provide an ion plasma when applying source power,causing said ions to diffuse towards the substrate by applying a bias power such that the portions of said substrate not being covered by said mask are etched away, wherein the dosage of HCl, Cl.sub.2 and N.sub.2 is chosen such that newly formed portions of the sidewall surfaces are passivated by by-product of Si, Cl, and N.sub.2 and thus become protected from further being etched. The bias power is less than 70 Watts to ensure that the etching process is predominantly chemical.

    摘要翻译: 用于制造具有垂直或近垂直侧壁的突出结构的去耦等离子体蚀刻工艺。 解耦等离子体蚀刻工艺包括以下步骤:在半导体衬底的顶部形成掩模,限定要在所述衬底中形成的突出结构的横向尺寸,将HCl,Cl 2和N 2进料到等离子体室中以提供离子等离子体 施加源功率,通过施加偏压功率使所述离子向衬底扩散,使得不被所述掩模覆盖的所述衬底的部分被蚀刻掉,其中选择HCl,Cl 2和N 2的剂量使得新形成的部分 的侧壁表面被Si,Cl和N 2的副产物钝化,从而被防止进一步被蚀刻。 偏置功率小于70瓦,以确保蚀刻工艺主要是化学的。