公开(公告)号：US07301415B2

公开(公告)日：2007-11-27

申请号：US11164924

申请日：2005-12-12

申请人： Chung-Cheng Wang ,  Chao-Shi Chuang ,  Wen-Shih Lu ,  Yu-Chang Chen

发明人： Chung-Cheng Wang ,  Chao-Shi Chuang ,  Wen-Shih Lu ,  Yu-Chang Chen

IPC分类号： H03B1/00

CPC分类号： H03L7/10

摘要： A method for automatic frequency tuning in a phase lock loop suitable for use in multi-band VCO wireless systems having very limited initial frequency lock times is disclosed. A predetermined subset of VCOs out of a larger bank of VCOs is selected to serve as interpolation points. The interpolation point VCOs are pre-calibrated with a predetermined voltage and the resultingly generated frequency for each of the interpolation point VCOs is stored into memory as a (frequency, VCO) pair, one pair for each interpolation point VCO. When a desired frequency then is given to the system, an appropriate VCO is selected by interpolation using the (frequency, VCO) pairs of the two most adjacent interpolation points for tracking and locking.

摘要翻译： 公开了一种适用于具有非常有限的初始频率锁定时间的多频带VCO无线系统的锁相环中的自动频率调谐方法。 选择较大的VCO组中的VCO的预定子集用作内插点。 内插点VCO以预定电压进行预校准，并且每个内插点VCO的最终产生的频率作为（频率，VCO）对存储到存储器中，对于每个内插点VCO为一对。 当给系统给出期望的频率时，通过使用用于跟踪和锁定的两个最相邻插值点的（频率，VCO）对进行插值来选择适当的VCO。

公开(公告)号：US07047146B2

公开(公告)日：2006-05-16

申请号：US10707519

申请日：2003-12-19

申请人： Chao-Shi Chuang ,  Chung-Cheng Wang ,  Wen-Shih Lu

发明人： Chao-Shi Chuang ,  Chung-Cheng Wang ,  Wen-Shih Lu

IPC分类号： G01R35/00 ,  G06F19/00

CPC分类号： H03L7/113 ,  H03L7/0891 ,  H03L7/099 ,  H03L7/199

摘要： A PLL includes a loop filter for accumulating charge to generate a loop-filter voltage and a VCO having a plurality of frequency ranges. The VCO receives the loop-filter voltage and generates an output signal having a frequency according to the loop-filter voltage and a currently selected VCO frequency range. During PLL calibration, the loop-filter is connected to a constant voltage source; the PLL feedback signal is synchronized with the reference signal; a linear search, a binary search, or a memory lookup is used to find a first and a second VCO frequency range; first and second time durations are measured for the time durations between the second rising edges of the reference signal and the PLL feedback signal for the two VCO frequency ranges, and the optimal VCO frequency range is determined by setting the VCO frequency range to be the VCO frequency range having the shortest measured time duration.

摘要翻译： PLL包括用于累积电荷以产生环路滤波器电压的环路滤波器和具有多个频率范围的VCO。 VCO接收环路滤波器电压，并产生具有根据环路滤波器电压和当前选择的VCO频率范围的频率的输出信号。 在PLL校准期间，环路滤波器连接到恒定电压源; PLL反馈信号与参考信号同步; 使用线性搜索，二进制搜索或存储器查找来找到第一和第二VCO频率范围; 对于参考信号的第二上升沿和两个VCO频率范围的PLL反馈信号之间的持续时间测量第一和第二持续时间，并且通过将VCO频率范围设置为VCO来确定最佳VCO频率范围 频率范围具有最短的测量持续时间。

公开(公告)号：US20050190829A1

公开(公告)日：2005-09-01

申请号：US11067033

申请日：2005-02-25

申请人： Wen-Shih Lu ,  John-San Yang

发明人： Wen-Shih Lu ,  John-San Yang

IPC分类号： H04L27/00 ,  H04L27/20 ,  H04Q1/20

CPC分类号： H04L27/2067 ,  H04L2027/0016 ,  H04L2027/0018

摘要： A phase calibrating apparatus applied in a mixer includes a signal generator outputting a first signal and a second signal. The first signal has a phase differing by a phase value from the second signal. The phase calibrating apparatus is used to adjust the phase value to a predetermined value. The phase calibrating apparatus includes a multiplication unit and a comparator/controller unit. The multiplication unit has a multiplication of the first signal and the second signal to output a DC value corresponding to the phase value. The comparator/controller unit compares the DC value with a reference value and outputs a control signal. The signal generator adjusts the phase value according to the control signal until the phase value is substantially equal to the predetermined value.

摘要翻译： 施加在混合器中的相位校准装置包括输出第一信号和第二信号的信号发生器。 第一信号具有与第二信号相位相位相位相位差的相位。 相位校准装置用于将相位值调整到预定值。 相位校准装置包括乘法单元和比较器/控制器单元。 乘法单元具有第一信号和第二信号的相乘，以输出与相位值对应的DC值。 比较器/控制器单元将DC值与参考值进行比较，并输出控制信号。 信号发生器根据控制信号调整相位值，直到相位值基本上等于预定值。

公开(公告)号：US08374563B2

公开(公告)日：2013-02-12

申请号：US12470050

申请日：2009-05-21

申请人： Chan-Sheng Yang ,  Wen-Shih Lu ,  Yu-Hua Liu

发明人： Chan-Sheng Yang ,  Wen-Shih Lu ,  Yu-Hua Liu

IPC分类号： H04B1/06 ,  H04K3/00

CPC分类号： H03G3/001 ,  H03G3/3068

摘要： A gain control circuit of the wireless receiver comprises a plurality of stages-amplifier, an analog gain control circuit, and a digital gain control circuit, wherein the analog gain control circuit generates an analog controlling voltage for regulating the gain of the post-amplifier by an analog gain controlling process, and the digital gain control circuit is used for determining a plurality of gain curves for the pre-amplifier, and the gain curves are all operating between the first default voltage and second default voltage. While the analog controlling voltage is over the first default voltage or second default voltage, the gain curve will be switched, thereby, the analog gain controlling process can be with the digital gain controlling process therein for improving the linearity of the gain regulation and reducing the transient response during the gain switching process.

摘要翻译： 无线接收机的增益控制电路包括多个级放大器，模拟增益控制电路和数字增益控制电路，其中模拟增益控制电路产生模拟控制电压，用于通过以下步骤来调节后置放大器的增益 模拟增益控制处理，并且数字增益控制电路用于确定前置放大器的多个增益曲线，并且增益曲线都在第一默认电压和第二默认电压之间运行。 当模拟控制电压超过第一默认电压或第二默认电压时，增益曲线将被切换，从而模拟增益控制过程可以通过其中的数字增益控制处理来改善增益调节的线性度并减少 增益切换过程中的瞬态响应。

公开(公告)号：US20100015937A1

公开(公告)日：2010-01-21

申请号：US12470050

申请日：2009-05-21

申请人： Chan-Sheng YANG ,  Wen-Shih LU ,  Yu-Hua LIU

发明人： Chan-Sheng YANG ,  Wen-Shih LU ,  Yu-Hua LIU

IPC分类号： H04B1/06

CPC分类号： H03G3/001 ,  H03G3/3068

摘要： A gain control circuit of the wireless receiver comprises a plurality of stages-amplifier, an analog gain control circuit, and a digital gain control circuit, wherein the analog gain control circuit generates an analog controlling voltage for regulating the gain of the post-amplifier by an analog gain controlling process, and the digital gain control circuit is used for determining a plurality of gain curves for the pre-amplifier, and the gain curves are all operating between the first default voltage and second default voltage. While the analog controlling voltage is over the first default voltage or second default voltage, the gain curve will be switched, thereby, the analog gain controlling process can be with the digital gain controlling process therein for improving the linearity of the gain regulation and reducing the transient response during the gain switching process.

摘要翻译： 无线接收机的增益控制电路包括多个级放大器，模拟增益控制电路和数字增益控制电路，其中模拟增益控制电路产生模拟控制电压，用于通过以下步骤来调节后置放大器的增益 模拟增益控制处理，并且数字增益控制电路用于确定前置放大器的多个增益曲线，并且增益曲线都在第一默认电压和第二默认电压之间运行。 当模拟控制电压超过第一默认电压或第二默认电压时，增益曲线将被切换，从而模拟增益控制过程可以通过其中的数字增益控制处理来改善增益调节的线性度并减少 增益切换过程中的瞬态响应。

公开(公告)号：US20070132517A1

公开(公告)日：2007-06-14

申请号：US11164924

申请日：2005-12-12

申请人： Chung-Cheng Wang ,  Chao-Shi Chuang ,  Wen-Shih Lu ,  Yu-Chang Chen

发明人： Chung-Cheng Wang ,  Chao-Shi Chuang ,  Wen-Shih Lu ,  Yu-Chang Chen

IPC分类号： H03L7/00

CPC分类号： H03L7/10

摘要： A method for automatic frequency tuning in a phase lock loop suitable for use in multi-band VCO wireless systems having very limited initial frequency lock times is disclosed. A predetermined subset of VCOs out of a larger bank of VCOs is selected to serve as interpolation points. The interpolation point VCOs are pre-calibrated with a predetermined voltage and the resultingly generated frequency for each of the interpolation point VCOs is stored into memory as a (frequency, VCO) pair, one pair for each interpolation point VCO. When a desired frequency then is given to the system, an appropriate VCO is selected by interpolation using the (frequency, VCO) pairs of the two most adjacent interpolation points for tracking and locking.

摘要翻译： 公开了一种适用于具有非常有限的初始频率锁定时间的多频带VCO无线系统的锁相环中的自动频率调谐方法。 选择较大的VCO组中的VCO的预定子集用作内插点。 内插点VCO以预定电压进行预校准，并且每个内插点VCO的最终产生的频率作为（频率，VCO）对存储到存储器中，对于每个内插点VCO为一对。 当给系统给出期望的频率时，通过使用用于跟踪和锁定的两个最相邻插值点的（频率，VCO）对进行插值来选择适当的VCO。

公开(公告)号：US20050137816A1

公开(公告)日：2005-06-23

申请号：US10707519

申请日：2003-12-19

申请人： Chao-Shi Chuang ,  Chung-Cheng Wang ,  Wen-Shih Lu

发明人： Chao-Shi Chuang ,  Chung-Cheng Wang ,  Wen-Shih Lu

IPC分类号： G06F19/00 ,  H03L7/08 ,  H03L7/089 ,  H03L7/099 ,  H03L7/113 ,  H03L7/18 ,  H03L7/199

CPC分类号： H03L7/113 ,  H03L7/0891 ,  H03L7/099 ,  H03L7/199

摘要： A PLL includes a loop filter for accumulating charge to generate a loop-filter voltage and a VCO having a plurality of frequency ranges. The VCO receives the loop-filter voltage and generates an output signal having a frequency according to the loop-filter voltage and a currently selected VCO frequency range. During PLL calibration, the loop-filter is connected to a constant voltage source; the PLL feedback signal is synchronized with the reference signal; a linear search, a binary search, or a memory lookup is used to find a first and a second VCO frequency range; first and second time durations are measured for the time durations between the second rising edges of the reference signal and the PLL feedback signal for the two VCO frequency ranges, and the optimal VCO frequency range is determined by setting the VCO frequency range to be the VCO frequency range having the shortest measured time duration.

摘要翻译： PLL包括用于累积电荷以产生环路滤波器电压的环路滤波器和具有多个频率范围的VCO。 VCO接收环路滤波器电压，并产生具有根据环路滤波器电压和当前选择的VCO频率范围的频率的输出信号。 在PLL校准期间，环路滤波器连接到恒定电压源; PLL反馈信号与参考信号同步; 使用线性搜索，二进制搜索或存储器查找来找到第一和第二VCO频率范围; 对于参考信号的第二上升沿和两个VCO频率范围的PLL反馈信号之间的持续时间测量第一和第二持续时间，并且通过将VCO频率范围设置为VCO来确定最佳VCO频率范围 频率范围具有最短的测量持续时间。