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    Synthesizer and calibrating method for the same
    3.
    发明授权
    Synthesizer and calibrating method for the same 有权
    合成仪和校准方法相同

    公开(公告)号：US07180376B2

    公开(公告)日：2007-02-20

    申请号：US11034484

    申请日：2005-01-13

    Applicant: Chong-Ren Wang ,  Chao-Shi Chuang ,  Chung-Cheng Wang

    Inventor： Chong-Ren Wang ,  Chao-Shi Chuang ,  Chung-Cheng Wang

    IPC: H03L7/00

    CPC classification number: H03L7/1976 ,  H03L7/0898

    Abstract: Synthesizer and calibrating method utilizing same. The frequency synthesizer modulates input signals comprising a phase locked loop circuit. The phase locked loop circuit comprises a phase frequency detector for generating a first signal, a low pass filter for outputting a filtered control signal derived from the received first signal, a voltage control oscillator for generating an output signal with a first frequency based on the control signal, a frequency divider dividing the first frequency for output to the input terminal of the phase frequency detector, a modulator coupled to the frequency divider, a pre-emphasis filter receiving and filtering the input signal for output to the modulator, and an auto loop gain calibration circuit, receiving the control signal, and calculating a current gain of the control signal in accordance with the voltage of the control signal to compensate for the frequency response mismatch between the pre-emphasis filter and the frequency synthesizer.

    Abstract translation: 合成器和校准方法利用它。 频率合成器调制包括锁相环电路的输入信号。 锁相环电路包括用于产生第一信号的相位频率检测器，用于输出从接收到的第一信号导出的经滤波的控制信号的低通滤波器，用于基于控制产生具有第一频率的输出信号的电压控制振荡器 信号，将第一频率分频输出到相位频率检测器的输入端的分频器，耦合到分频器的调制器，预加重滤波器接收和滤波输入信号以输出到调制器，以及自动回路 增益校准电路，接收控制信号，以及根据控制信号的电压计算控制信号的当前增益，以补偿预加重滤波器和频率合成器之间的频率响应失配。

    Method and apparatus for RF signal demodulation
    4.
    发明申请
    Method and apparatus for RF signal demodulation 审中-公开
    RF信号解调的方法和装置

    公开(公告)号：US20060279446A1

    公开(公告)日：2006-12-14

    申请号：US11451362

    申请日：2006-06-13

    Applicant: Chung-Cheng Wang ,  John-San Yang

    Inventor： Chung-Cheng Wang ,  John-San Yang

    IPC: H03M1/12

    CPC classification number: H04B1/28 ,  H04B1/0028 ,  H04B1/0032

    Abstract: A radio frequency (RF) receiver is provided, comprising an antenna, a low noise amplifier, a down converter, a first analog to digital converter (ADC), a second ADC, a digital up converter. The antenna receives an RF signal, and the LNA coupled to the antenna amplifies the RF signal. The down converter, coupled to the LNA, down converts the RF signal to generate an in-phase baseband signal and a quadrature baseband signal. The first ADC, coupled to the down converter, digitizes the in-phase baseband signal to an in-phase digital signal. The second ADC, coupled to the down converter, digitizes the quadrature baseband signal to a quadrature digital signal. The digital up converter, coupled to the first and second ADCs, up converts the in-phase digital signal and quadrature digital signal to generate an intermediate frequency (IF) signal.

    Abstract translation: 提供了一种射频（RF）接收机，包括天线，低噪声放大器，下变频器，第一模数转换器（ADC），第二ADC，数字上变频器。 天线接收RF信号，耦合到天线的LNA放大RF信号。 耦合到LNA的下变频器将RF信号下变频以产生同相基带信号和正交基带信号。 耦合到下变频器的第一个ADC将同相基带信号数字化为同相数字信号。 耦合到下变频器的第二个ADC将正交基带信号数字化为正交数字信号。 耦合到第一和第二ADC的数字上变频器向上转换同相数字信号和正交数字信号以产生中频（IF）信号。

    Synthesizer and calibrating method for the same
    5.
    发明申请
    Synthesizer and calibrating method for the same 有权
    合成仪和校准方法相同

    公开(公告)号：US20050156676A1

    公开(公告)日：2005-07-21

    申请号：US11034484

    申请日：2005-01-13

    Applicant: Chong-Ren Wang ,  Chao-Shi Chuang ,  Chung-Cheng Wang

    Inventor： Chong-Ren Wang ,  Chao-Shi Chuang ,  Chung-Cheng Wang

    IPC: H03L7/00 ,  H03L7/089 ,  H03L7/16 ,  H03L7/197

    CPC classification number: H03L7/1976 ,  H03L7/0898

    Abstract: Synthesizer and calibrating method utilizing same. The frequency synthesizer modulates input signals comprising a phase locked loop circuit. The phase locked loop circuit comprises a phase frequency detector for generating a first signal, a low pass filter for outputting a filtered control signal derived from the received first signal, a voltage control oscillator for generating an output signal with a first frequency based on the control signal, a frequency divider dividing the first frequency for output to the input terminal of the phase frequency detector, a modulator coupled to the frequency divider, a pre-emphasis filter receiving and filtering the input signal for output to the modulator, and an auto loop gain calibration circuit, receiving the control signal, and calculating a current gain of the control signal in accordance with the voltage of the control signal to compensate for the frequency response mismatch between the pre-emphasis filter and the frequency synthesizer.

    Abstract translation: 合成器和校准方法利用它。 频率合成器调制包括锁相环电路的输入信号。 锁相环电路包括用于产生第一信号的相位频率检测器，用于输出从接收到的第一信号导出的经滤波的控制信号的低通滤波器，用于基于控制产生具有第一频率的输出信号的电压控制振荡器 信号，将第一频率分频输出到相位频率检测器的输入端的分频器，耦合到分频器的调制器，预加重滤波器接收和滤波输入信号以输出到调制器，以及自动回路 增益校准电路，接收控制信号，以及根据控制信号的电压计算控制信号的当前增益，以补偿预加重滤波器和频率合成器之间的频率响应失配。

    Method of pre-treating a wafer surface before applying a solvent-containing material thereon
    7.
    发明授权
    Method of pre-treating a wafer surface before applying a solvent-containing material thereon 有权
    在将含有溶剂的材料涂覆在其上之前预处理晶片表面的方法

    公开(公告)号：US09170496B2

    公开(公告)日：2015-10-27

    申请号：US13365660

    申请日：2012-02-03

    Applicant: Chi-Hua Fu ,  Chung-Cheng Wang

    Inventor： Chi-Hua Fu ,  Chung-Cheng Wang

    IPC: B08B3/02 ,  B08B3/00 ,  B08B7/00 ,  B08B7/04 ,  G03F7/16 ,  G03F7/09 ,  G03F7/095

    CPC classification number: G03F7/16 ,  B08B3/00 ,  B08B3/02 ,  B08B7/00 ,  B08B7/04 ,  G03F7/091 ,  G03F7/094 ,  G03F7/095

    Abstract: A method for pre-treating a wafer surface before applying a material thereon. The method includes positioning the wafer on a rotating apparatus. The wafer is rotated at a first rotational speed between about 50 revolutions per minute (rpm) and about 300 rpm and for a period of about 1 second to about 10 seconds while dispensing a cleaning solvent on the wafer surface. The wafer is rotated at a second rotational speed between about 500 rpm and about 1,500 rpm for a period of about 1 second to about 10 seconds. The wafer is then rotated at a third rotational speed between about 50 rpm and about 300 rpm for a period of about 1 second to about 5 seconds. With the wafer rotating at the third rotational speed, a solvent-containing material is thereafter deposited on the surface of the wafer.

    Abstract translation: 一种在施加材料之前预处理晶片表面的方法。 该方法包括将晶片定位在旋转装置上。 以约50转/分钟（rpm）和约300rpm之间的第一旋转速度旋转晶片，并且在晶片表面上分配清洁溶剂约1秒至约10秒的时间。 晶片以约500rpm至约1500rpm之间的第二转速旋转约1秒至约10秒的时间。 然后将晶片以约50rpm至约300rpm之间的第三转速旋转约1秒至约5秒的时间。 随着晶片以第三转速旋转，此后在晶片的表面上沉积含溶剂的材料。

    SUBSTRATE FOR AN ELECTRICAL DEVICE
    8.
    发明申请
    SUBSTRATE FOR AN ELECTRICAL DEVICE 审中-公开
    电气设备基板

    公开(公告)号：US20110242782A1

    公开(公告)日：2011-10-06

    申请号：US13079844

    申请日：2011-04-05

    Applicant: CHUNG-CHENG WANG

    Inventor： CHUNG-CHENG WANG

    IPC: H05K7/02 ,  H05K1/02 ,  H05K1/11

    CPC classification number: H05K1/115 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/3011 ,  H05K1/185 ,  H05K2201/09845 ,  H05K2203/049 ,  H01L2924/00014 ,  H01L2924/00

    Abstract: Substrate for electrical devices is disclosed. An embodiment for the substrate comprised of an insulator and a conductive element(s), wherein the conductive element embedded in the insulator, said conductive element also enables to be comprised of an upper portion(s) and a lower portion(s) which are unitary and stack; wherein the surfaces of said conductive element contacted with said insulator enables to be increased, then said conductive layer can be held by said insulator more securely, in this manner, it enables to be prevented said conductive element from peeling off said insulator, and then the reliability of said substrate in accordance with the present invention enables to be enhanced; meanwhile, said substrate can further include a chip which is embedded therein, in order that said substrate being capable of affording a thinner electrical device thickness and enhanced reliability.

    Abstract translation: 公开了用于电气设备的基板。 一种用于由绝缘体和导电元件构成的衬底的实施例，其中嵌入在绝缘体中的导电元件也能够由上部和下部组成，上部和下部 单一和堆叠 其中与所述绝缘体接触的所述导电元件的表面能够增加，则所述导电层可以被所述绝缘体更牢固地保持，以这种方式，能够防止所述导电元件从所述绝缘体上剥离，然后 能够提高根据本发明的所述基板的可靠性; 同时，所述衬底还可以包括嵌入其中的芯片，以便所述衬底能够提供更薄的电子器件厚度和增强的可靠性。

    Phase lock loop and operating method thereof
    10.
    发明申请
    Phase lock loop and operating method thereof 有权
    锁相环及其操作方法

    公开(公告)号：US20070001770A1

    公开(公告)日：2007-01-04

    申请号：US11455730

    申请日：2006-06-20

    Applicant: Chung-Cheng Wang ,  Chao-Shi Chuang ,  Yi-Chuan Liu

    Inventor： Chung-Cheng Wang ,  Chao-Shi Chuang ,  Yi-Chuan Liu

    IPC: H03L7/00

    CPC classification number: H03L7/113 ,  H03L7/1972

    Abstract: A PLL is provided, comprising a first divider, a PFD, a loop filter, a VCO, a second divider and a controller. The first divider receives a reference signal and divides the reference signal by R to obtain a divided signal. The PFD compares the divided signal and a feedback signal to generate a compared The VCO selects one of a plurality of operating curves for oscillation based on a selection signal, and generates an oscillation signal based on an operating voltage generated by signal the loop filter. The second divider divides the oscillation signal by N to obtain the feedback signal. The controller operates in an initial mode to recursively determine the selection signal by calculating differences of the feedback signal and the divided signal. When the selection signal converges to stable, the PLL switches to a normal mode to operate on the corresponding operating curve.

    Abstract translation: 提供PLL，包括第一分频器，PFD，环路滤波器，VCO，第二分频器和控制器。 第一分频器接收参考信号并将参考信号除以R以获得分频信号。 PFD比较分频信号和反馈信号以产生比较VCO基于选择信号选择多个用于振荡的操作曲线中的一个，并且基于由环路滤波器的信号产生的工作电压产生振荡信号。 第二分频器将振荡信号除以N以获得反馈信号。 控制器以初始模式工作，通过计算反馈信号和分频信号的差异递归地确定选择信号。 当选择信号收敛到稳定时，PLL切换到正常模式，以对相应的工作曲线进行操作。

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