High efficiency NLTL comb generator using time domain waveform synthesis technique

    公开(公告)号:US20080169846A1

    公开(公告)日:2008-07-17

    申请号:US11651989

    申请日:2007-01-11

    IPC分类号: H03B21/00 G06F1/04 H03K7/02

    CPC分类号: H03B25/00 H03K5/12

    摘要: A device and method are disclosed for synthesizing a waveform having pulse segments. An exemplary generator can include units having a time delay element and pulse generator generating the pulse segments. An input divider divides an input signal into signal instances that propagate through the units and an output combiner combines pulse segments to form the waveform. The pulse generators include a sharpening circuit for sharpening a rising edge and a falling edge of the pulse segments. The sharpening circuit includes a tunable delay element coupled to a non-linear transmission line (NLTL). Another NLTL can be coupled in parallel with the tunable delay element and the first NLTL. The NLTLs include input sections coupled to anodes or cathodes of Schottky diode elements, and the respective cathodes or anodes are coupled to a signal ground.

    3D MMIC balun and methods of making the same
    2.
    发明申请
    3D MMIC balun and methods of making the same 有权
    3D MMIC平衡 - 不平衡变换器及其制作方法

    公开(公告)号:US20070052491A1

    公开(公告)日:2007-03-08

    申请号:US11218968

    申请日:2005-09-02

    IPC分类号: H03H7/42

    摘要: A three dimensional (3D) monolithic integrated circuit (MMIC) balun and methods of making the same are provided. A primary spiral winding is spaced apart from a secondary primary winding by a gap in a substantially aligned stacked configuration forming a balun. The gap medium can be a low dielectric constant material if employing a multi-metal process or air if employing a wafer level packaging process.

    摘要翻译: 提供了三维(3D)单片集成电路(MMIC)平衡 - 不平衡变换器及其制造方法。 初级螺旋绕组与次级初级绕组间隔开一个形成一个平衡 - 不平衡变换器的基本对齐的堆叠结构的间隙。 如果使用多金属工艺或空气,如果采用晶片级封装工艺,间隙介质可以是低介电常数材料。

    Monolithic microwave integrated circuit (MMIC) waveguide resonators having a tunable ferroelectric layer
    4.
    发明授权
    Monolithic microwave integrated circuit (MMIC) waveguide resonators having a tunable ferroelectric layer 有权
    具有可调谐铁电层的单片微波集成电路(MMIC)波导谐振器

    公开(公告)号:US07570137B2

    公开(公告)日:2009-08-04

    申请号:US11288049

    申请日:2005-11-14

    IPC分类号: H01P7/06

    CPC分类号: H01P7/065

    摘要: A ferroelectric loaded waveguide resonator capable of operation at microwave, millimeter-wave and higher frequencies and suitable for integration into a three-dimensional monolithic microwave integrated circuit (3D MMIC) is disclosed. The resonator includes a resonator cavity, which, in one form of the invention, is formed by two parallel metal layers and a metallized wall structure extending between the metal layers. The cavity is filled with dielectric material and includes a layer of ferroelectric material, which is used to control the resonant frequency by varying a voltage bias applied to the ferroelectric layer. The cavity includes a slot in one of the metal layers and a coupling strip formed adjacent to the slot to provide electromagnetic coupling to other components, such as a voltage controlled oscillator (VCO). The invention can also be applied to other multi-metal semiconductor or wafer level packaging technologies.

    摘要翻译: 公开了一种能够在微波,毫米波和更高频率下操作并且适合于集成到三维单片微波集成电路(3D MMIC)中的铁电负载波导谐振器。 谐振器包括谐振器腔,其在本发明的一种形式中由两个平行的金属层和在金属层之间延伸的金属化壁结构形成。 空腔填充有电介质材料,并且包括铁电材料层,其用于通过改变施加到铁电层的电压偏压来控制谐振频率。 空腔包括在金属层中的一个中的槽和与槽相邻形成的耦合条,以提供与其它部件(例如压控振荡器(VCO))的电磁耦合。 本发明也可应用于其他多金属半导体或晶圆级封装技术。

    3D MMIC balun and methods of making the same
    5.
    发明授权
    3D MMIC balun and methods of making the same 有权
    3D MMIC平衡 - 不平衡变换器及其制作方法

    公开(公告)号:US07570129B2

    公开(公告)日:2009-08-04

    申请号:US11218968

    申请日:2005-09-02

    IPC分类号: H01F5/00

    摘要: A three dimensional (3D) monolithic integrated circuit (MMIC) balun and methods of making the same are provided. A primary spiral winding is spaced apart from a secondary primary winding by a gap in a substantially aligned stacked configuration forming a balun. The gap medium can be a low dielectric constant material if employing a multi-metal process or air if employing a wafer level packaging process.

    摘要翻译: 提供了三维(3D)单片集成电路(MMIC)平衡 - 不平衡变换器及其制造方法。 初级螺旋绕组与次级初级绕组间隔开一个形成一个平衡 - 不平衡变换器的基本对齐的堆叠结构的间隙。 如果使用多金属工艺或空气,如果采用晶片级封装工艺,间隙介质可以是低介电常数材料。

    Tunable MMIC (monolithic microwave integrated circuit) waveguide resonators
    6.
    发明申请
    Tunable MMIC (monolithic microwave integrated circuit) waveguide resonators 有权
    可调MMIC(单片微波集成电路)波导谐振器

    公开(公告)号:US20070109078A1

    公开(公告)日:2007-05-17

    申请号:US11288049

    申请日:2005-11-14

    IPC分类号: H01P7/00

    CPC分类号: H01P7/065

    摘要: A ferroelectric loaded waveguide resonator capable of operation at microwave, millimeter-wave and higher frequencies and suitable for integration into a three-dimensional monolithic microwave integrated circuit (3D MMIC) is disclosed. The resonator includes a resonator cavity, which, in one form of the invention, is formed by two parallel metal layers and a metallized wall structure extending between the metal layers. The cavity is filled with dielectric material and includes a layer of ferroelectric material, which is used to control the resonant frequency by varying a voltage bias applied to the ferroelectric layer. The cavity includes a slot in one of the metal layers and a coupling strip formed adjacent to the slot to provide electromagnetic coupling to other components, such as a voltage controlled oscillator (VCO). The invention can also be applied to other multi-metal semiconductor or wafer level packaging technologies.

    摘要翻译: 公开了一种能够在微波,毫米波和更高频率下操作并且适合于集成到三维单片微波集成电路(3D MMIC)中的铁电负载波导谐振器。 谐振器包括谐振器腔,其在本发明的一种形式中由两个平行的金属层和在金属层之间延伸的金属化壁结构形成。 空腔填充有电介质材料,并且包括铁电材料层,其用于通过改变施加到铁电层的电压偏压来控制谐振频率。 空腔包括在金属层中的一个中的槽和与槽相邻形成的耦合条,以提供与其它部件(例如压控振荡器(VCO))的电磁耦合。 本发明也可应用于其他多金属半导体或晶圆级封装技术。

    3D MMIC VCO and methods of making the same
    7.
    发明申请
    3D MMIC VCO and methods of making the same 有权
    3D MMIC VCO和制作方法相同

    公开(公告)号:US20070069824A1

    公开(公告)日:2007-03-29

    申请号:US11236033

    申请日:2005-09-27

    IPC分类号: H03K3/03

    CPC分类号: H03B5/1841

    摘要: A three dimensional (3D) microwave monolithic integrated circuit (MMIC) multi-push voltage controlled oscillator (VCO) and methods of making the same is provided. The 3D MMIC multi-push oscillator includes a plurality of matching frequency oscillators coupled to a phasing ring in substantially equidistantly spaced apart locations. A combined VCO output signal is provided at a central output connection point of the phasing ring. The central output connection point resides on a first plane. An output conductor transition has a first end coupled to the central output connection point and a second end provided as an output to the quad-push VCO. The output conductor transition extends transverse to the first plane and terminates at a second plane separated from the first plane. The multi-push oscillator can be a push-push, quad-push or N-push type VCO based on a particular implementation.

    摘要翻译: 提供三维(3D)微波单片集成电路(MMIC)多压电压控振荡器(VCO)及其制作方法。 3D MMIC多按钮振荡器包括多个匹配的频率振荡器,其耦合到基本上等间隔开的位置的相控环。 在相控环的中心输出连接点处提供组合的VCO输出信号。 中央输出连接点位于第一平面上。 输出导体跃迁具有耦合到中心输出连接点的第一端和作为四推压VCO的输出提供的第二端。 输出导体跃迁横向于第一平面延伸并终止于与第一平面分离的第二平面。 多按钮振荡器可以是基于特定实现的推挽式,四推式或N推式VCO。

    True time delay circuits including archimedean spiral delay lines
    9.
    发明授权
    True time delay circuits including archimedean spiral delay lines 有权
    真正的延时电路,包括阿基米德螺旋延迟线

    公开(公告)号:US08610515B2

    公开(公告)日:2013-12-17

    申请号:US13103634

    申请日:2011-05-09

    IPC分类号: H01P1/18

    CPC分类号: H01P9/02

    摘要: A time delay circuit including at least one spiral delay line formed on a top surface of a first substrate. In one embodiment, the delay line is defined by two concentric spiral delay line sections. Vias extend through the substrate between the delay line sections to reduce cross-talk therebetween. In another embodiment, the delay circuit includes a second substrate spaced from the first substrate, where a spiral delay line is formed on a top surface of the second substrate. A planar metal layer is provided on a backside surface of the first substrate and a conductive element extends through an opening in the metal layer and is coupled to the spiral delay lines, where the planar member provides magnetic isolation between the delay lines. In yet another embodiment, a multi-bit switched circuit can be provided on one of the substrates and be electrically connected to the delay line.

    摘要翻译: 一种延迟电路,包括形成在第一基板的顶表面上的至少一个螺旋延迟线。 在一个实施例中,延迟线由两个同心的螺旋延迟线部分限定。 通孔延伸穿过延迟线部分之间的衬底,以减少它们之间的串扰。 在另一个实施例中,延迟电路包括与第一衬底间隔开的第二衬底,其中螺旋延迟线形成在第二衬底的顶表面上。 平面金属层设置在第一基板的背面上,并且导电元件延伸穿过金属层中的开口并且连接到螺旋延迟线,其中平面构件在延迟线之间提供磁隔离。 在另一个实施例中,可以在一个基板上提供多位开关电路,并且电连接到延迟线。

    ULTRA WIDEBAND TRUE TIME DELAY LINES
    10.
    发明申请
    ULTRA WIDEBAND TRUE TIME DELAY LINES 有权
    超级宽带真正的延时线

    公开(公告)号:US20120286899A1

    公开(公告)日:2012-11-15

    申请号:US13103634

    申请日:2011-05-09

    IPC分类号: H01P1/18

    CPC分类号: H01P9/02

    摘要: A time delay circuit including at least one spiral delay line formed on a top surface of a first substrate. In one embodiment, the delay line is defined by two concentric spiral delay line sections. Vias extend through the substrate between the delay line sections to reduce cross-talk therebetween. In another embodiment, the delay circuit includes a second substrate spaced from the first substrate, where a spiral delay line is formed on a top surface of the second substrate. A planar metal layer is provided on a backside surface of the first substrate and a conductive element extends through an opening in the metal layer and is coupled to the spiral delay lines, where the planar member provides magnetic isolation between the delay lines. In yet another embodiment, a multi-bit switched circuit can be provided on one of the substrates and be electrically connected to the delay line.

    摘要翻译: 一种延迟电路,包括形成在第一基板的顶表面上的至少一个螺旋延迟线。 在一个实施例中,延迟线由两个同心的螺旋延迟线部分限定。 通孔延伸穿过延迟线部分之间的衬底,以减少它们之间的串扰。 在另一个实施例中,延迟电路包括与第一衬底间隔开的第二衬底,其中螺旋延迟线形成在第二衬底的顶表面上。 平面金属层设置在第一基板的背面上,并且导电元件延伸穿过金属层中的开口并且连接到螺旋延迟线,其中平面构件在延迟线之间提供磁隔离。 在另一个实施例中,可以在一个基板上提供多位开关电路,并且电连接到延迟线。