PUSH-PUSH OSCILLATOR CIRCUIT
    1.
    发明申请
    PUSH-PUSH OSCILLATOR CIRCUIT 有权
    推压振荡器电路

    公开(公告)号:US20130141175A1

    公开(公告)日:2013-06-06

    申请号:US13814764

    申请日:2010-08-26

    IPC分类号: H02M7/5383

    摘要: A push-push oscillator circuit with a first oscillation branch with a first active device and a first tank adapted to provide a signal having a fundamental frequency f0, a second oscillation branch with a second active device and a second tank symmetrical to the first oscillation branch and adapted to provide a signal having the fundamental frequency f0. Output branches are coupled to the first oscillation branch and the second oscillation branch to provide signals having the second harmonic frequency 2f0 of the fundamental signal based on the signals having the fundamental frequency f0 and/or to provide signals having the fundamental frequency f0; The push-push oscillator circuit further comprises at least one terminal branch with a terminal adapted to provide a component of a differential signal having the second harmonic frequency 2f0 or the fundamental frequency f0. The at least one terminal branch comprises a RF stub.

    摘要翻译: 一种具有第一振荡分支的推挽振荡器电路,具有第一有源器件和适于提供具有基频f0的信号的第一振荡器,具有第二有源器件的第二振荡分支和与第一振荡分支对称的第二振荡器 并且适于提供具有基频f0的信号。 输出分支耦合到第一振荡分支和第二振荡分支,以基于具有基频f0的信号和/或提供具有基频f0的信号来提供具有基波信号的二次谐波频率2f0的信号; 推挽振荡器电路还包括至少一个终端分支,其具有适于提供具有二次谐波频率2f0或基频f0的差分信号的分量的终端。 至少一个终端分支包括RF短截线。

    MODULATOR COMPRISING A DUAL-FREQUENCY OSCILLATOR AND A SYNTHESIZER
    2.
    发明申请
    MODULATOR COMPRISING A DUAL-FREQUENCY OSCILLATOR AND A SYNTHESIZER 审中-公开
    包含双频振荡器和合成器的调制器

    公开(公告)号:US20090115546A1

    公开(公告)日:2009-05-07

    申请号:US11571577

    申请日:2005-07-01

    IPC分类号: H03C3/09 H03B25/00

    摘要: Oscillators (10) which oscillate at a fundamental frequency also generate harmonics. The fundamental frequency or a lower harmonic is used for feedback purposes, and a harmonic higher than either the fundamental frequency or the lower harmonic is used for output purposes. As a result, the oscillators (10) operate at a lower frequency than an output frequency and are low cost. Synthesizers (20) coupled to the oscillators (10) also operate at this lower frequency, and modulators (5) comprising such oscillators (10) and synthesizers (20) are low cost. A lower power consumption and less sensitivity to disturbing fields are further advantages. Filtering has become less complicated, and a smaller number of components has resulted in smaller dimensions. The oscillators (10) comprise tuning circuits (11) and amplifiers (12), which amplifiers (12) are fed back via feedback circuits (13). Such an amplifier (12) may comprise just a single transistor (40).

    摘要翻译: 以基频振荡的振荡器(10)也产生谐波。 基频或低次谐波用于反馈目的,并且高于基波或低次谐波的谐波用于输出目的。 结果,振荡器(10)的工作频率比输出频率低,成本低。 耦合到振荡器(10)的合成器(20)也以较低的频率工作,并且包括这种振荡器(10)和合成器(20)的调制器(5)是低成本的。 较低的功耗和对干扰场的敏感性较低是进一步的优点。 过滤变得不那么复杂,并且更少的部件已经导致更小的尺寸。 振荡器(10)包括调谐电路(11)和放大器(12),放大器(12)经反馈电路(13)反馈。 这种放大器(12)可以仅包括单个晶体管(40)。

    MULTIPLE FREQUENCY GENERATOR FOR QUADRATURE AMPLITUDE MODULATED COMMUNICATIONS
    3.
    发明申请
    MULTIPLE FREQUENCY GENERATOR FOR QUADRATURE AMPLITUDE MODULATED COMMUNICATIONS 有权
    用于三角振幅调制通信的多频发生器

    公开(公告)号:US20080100387A1

    公开(公告)日:2008-05-01

    申请号:US11866766

    申请日:2007-10-03

    IPC分类号: H03L7/085 H03B21/02

    摘要: Multiple carrier frequencies are provided from a phase locked loop, especially closely adjacent quadrature amplitude modulated subcarriers for multiplexed data communications. A quadrature voltage controlled oscillator (VCO) and cascaded frequency dividers provide feedback to a phase comparator to lock the VCO to a reference signal. In addition to frequency divider outputs for use as subcarriers, e.g., binary division factors of the VCO frequency, a quadrature mixer multiplies and adds corresponding quadrature components at two of the frequencies, to generate a differential signal at a difference frequency. The mixer may be outside of the feedback signal path but preferably is in the feedback path to suppress noise. A polyphase filter converts the mixer output to a quadrature signal useful as a subcarrier. The technique efficiently generates sequential integer multiples of a basic frequency, such as sixteen adjacent integer multiples of a frequency reference.

    摘要翻译: 多个载波频率从锁相环提供,特别是紧密相邻的正交幅度调制副载波,用于复用数据通信。 正交压控振荡器(VCO)和级联分频器向相位比较器提供反馈以将VCO锁定到参考信号。 除了用作子载波的分频器输出,例如VCO频率的二进制分频因子之外,正交混频器在两个频率上乘法并相加正交分量,以产生差分频率的差分信号。 混频器可以在反馈信号路径之外,但是优选地在反馈路径中以抑制噪声。 多相滤波器将混频器输出转换为可用作子载波的正交信号。 该技术有效地生成基本频率的顺序整数倍,例如频率参考的十六个相邻整数倍。

    Voltage controlled oscillator for frequency synthesizer
    4.
    发明授权
    Voltage controlled oscillator for frequency synthesizer 有权
    用于频率合成器的压控振荡器

    公开(公告)号:US07292108B2

    公开(公告)日:2007-11-06

    申请号:US10999712

    申请日:2004-11-30

    申请人: Yasuhiro Ikarashi

    发明人: Yasuhiro Ikarashi

    IPC分类号: H03B1/00

    摘要: The voltage controlled oscillator includes an oscillating transistor, and first and second inductance elements which are connected in series and provided between an output terminal of the oscillating transistor and a high frequency ground point Vcc. Oscillating signals are output from the output terminal of the oscillating transistor and a connecting point between the first inductance element and the second inductance element, respectively. The output terminal of the oscillating transistor outputs a fundamental wave having a high level, and the connecting point between two inductance elements outputs the harmonic wave, suppressing the fundamental wave.

    摘要翻译: 压控振荡器包括振荡晶体管和串联连接并设置在振荡晶体管的输出端子与高频接地点Vcc之间的第一和第二电感元件。 振荡信号从振荡晶体管的输出端子和第一电感元件与第二电感元件之间的连接点分别输出。 振荡晶体管的输出端子输出高电平的基波,两个电感元件之间的连接点输出谐波,抑制基波。

    Tunable, maximum power output, frequency harmonic comb generator
    5.
    发明授权
    Tunable, maximum power output, frequency harmonic comb generator 有权
    可调谐,最大功率输出,频率谐波梳发生器

    公开(公告)号:US07193486B2

    公开(公告)日:2007-03-20

    申请号:US11038354

    申请日:2005-01-19

    IPC分类号: H03K3/36 H03K3/00

    CPC分类号: H03K5/12 H03B25/00

    摘要: A comb frequency generator that is tunable to vary the width of the pulses in the output signal and achieve a maximum power output at different harmonic frequencies. A wavefront compression device receives a sinusoidal input signal and provides wavefront compression to create a compressed signal having a series of periodic fast edges. A delay device receives the fast-edge compressed signal and delays the fast-edge signal to create a delayed fast-edge signal. A combining device receives the original fast-edge compressed signal and the delayed fast-edge compressed signal to generate an output signal including a series of pulses having a width determined by the delay of the delayed signal. In one embodiment, the delay device is a shorted transmission line stub having a length selectively set by a series of MEM devices. In another embodiment, the delay device is an NLTL variable time delay device that delays the fast-edge signal.

    摘要翻译: 梳状频率发生器,可调谐以改变输出信号中的脉冲宽度,并实现不同谐波频率下的最大功率输出。 波前压缩装置接收正弦输入信号并提供波前压缩以产生具有一系列周期性快速边缘的压缩信号。 延迟装置接收快速边缘压缩信号并延迟快速边缘信号以产生延迟的快速边缘信号。 组合装置接收原始快速边缘压缩信号和延迟的快速边缘压缩信号,以产生包括具有由延迟信号的延迟确定的宽度的一系列脉冲的输出信号。 在一个实施例中,延迟装置是具有由一系列MEM装置选择性地设置的长度的短路传输线短截线。 在另一个实施例中,延迟装置是延迟快速边缘信号的NLTL可变时间延迟装置。

    Low phase noise crystal oscillator with supply noise filtering
    6.
    发明申请
    Low phase noise crystal oscillator with supply noise filtering 有权
    低噪声晶体振荡器,具有电源噪声滤波功能

    公开(公告)号:US20060208814A1

    公开(公告)日:2006-09-21

    申请号:US11084941

    申请日:2005-03-21

    申请人: Hung-Ming Chien

    发明人: Hung-Ming Chien

    IPC分类号: H03B1/00

    摘要: A low phase noise crystal oscillator with supply noise filtering is provided and may comprise receiving an input voltage at a positive potential input of an oscillator circuit, which may comprise an oscillator core and a buffer coupled to an output of the oscillator core. Noise caused by the input voltage that may affect the buffer may be filtered using a resistor coupled between the positive potential input of the oscillator circuit and the input voltage, and a capacitor coupled between the positive potential input of the oscillator circuit and a ground of the oscillator circuit. The noise may be filtered via a low pass filter, which may comprise at least the resistor and the capacitor. A cutoff frequency may be selected for the low pass filter, and a resistance value for the resistor and a capacitance value for the capacitor may be selected appropriately.

    摘要翻译: 提供了具有电源噪声滤波的低相位噪声晶体振荡器,并且可以包括在振荡器电路的正电位输入端处接收输入电压,振荡器电路可以包括耦合到振荡器芯的输出的振荡器核和缓冲器。 由可能影响缓冲器的输入电压引起的噪声可以使用耦合在振荡器电路的正电位输入端和输入电压之间的电阻器和耦合在振荡器电路的正电位输入端和地 振荡电路。 可以通过低通滤波器对噪声进行滤波,低通滤波器可以至少包括电阻器和电容器。 可以为低通滤波器选择截止频率,并且可以适当地选择电阻器的电阻值和电容器的电容值。

    Tunable, maximum power output, frequency harmonic comb generator
    7.
    发明申请
    Tunable, maximum power output, frequency harmonic comb generator 有权
    可调谐,最大功率输出,频率谐波梳发生器

    公开(公告)号:US20060158277A1

    公开(公告)日:2006-07-20

    申请号:US11038354

    申请日:2005-01-19

    IPC分类号: H04B3/04

    CPC分类号: H03K5/12 H03B25/00

    摘要: A comb frequency generator that is tunable to vary the width of the pulses in the output signal and achieve a maximum power output at different harmonic frequencies. A wavefront compression device receives a sinusoidal input signal and provides wavefront compression to create a compressed signal having a series of periodic fast edges. A delay device receives the fast-edge compressed signal and delays the fast-edge signal to create a delayed fast-edge signal. A combining device receives the original fast-edge compressed signal and the delayed fast-edge compressed signal to generate an output signal including a series of pulses having a width determined by the delay of the delayed signal. In one embodiment, the delay device is a shorted transmission line stub having a length selectively set by a series of MEM devices. In another embodiment, the delay device is an NLTL variable time delay device that delays the fast-edge signal.

    摘要翻译: 梳状频率发生器,可调谐以改变输出信号中的脉冲宽度,并实现不同谐波频率下的最大功率输出。 波前压缩装置接收正弦输入信号并提供波前压缩以产生具有一系列周期性快速边缘的压缩信号。 延迟装置接收快速边缘压缩信号并延迟快速边缘信号以产生延迟的快速边缘信号。 组合装置接收原始快速边缘压缩信号和延迟的快速边缘压缩信号,以产生包括具有由延迟信号的延迟确定的宽度的一系列脉冲的输出信号。 在一个实施例中,延迟装置是具有由一系列MEM装置选择性地设置的长度的短路传输线短截线。 在另一个实施例中,延迟装置是延迟快速边缘信号的NLTL可变时间延迟装置。

    Voltage controlled oscillator for frequency synthesizer
    8.
    发明申请
    Voltage controlled oscillator for frequency synthesizer 有权
    用于频率合成器的压控振荡器

    公开(公告)号:US20050122177A1

    公开(公告)日:2005-06-09

    申请号:US10999712

    申请日:2004-11-30

    申请人: Yasuhiro Ikarashi

    发明人: Yasuhiro Ikarashi

    摘要: The voltage controlled oscillator includes an oscillating transistor, and first and second inductance elements which are connected in series and provided between an output terminal of the oscillating transistor and a high frequency ground point Vcc. Oscillating signals are output from the output terminal of the oscillating transistor and a connecting point between the first inductance element and the second inductance element, respectively. The output terminal of the oscillating transistor outputs a fundamental wave having a high level, and the connecting point between two inductance elements outputs the harmonic wave, suppressing the fundamental wave.

    摘要翻译: 压控振荡器包括振荡晶体管和串联连接并设置在振荡晶体管的输出端子与高频接地点Vcc之间的第一和第二电感元件。 振荡信号从振荡晶体管的输出端子和第一电感元件与第二电感元件之间的连接点分别输出。 振荡晶体管的输出端子输出高电平的基波,两个电感元件之间的连接点输出谐波,抑制基波。

    Frequency synthesizer
    9.
    发明授权
    Frequency synthesizer 失效
    频率合成器

    公开(公告)号:US5668504A

    公开(公告)日:1997-09-16

    申请号:US678486

    申请日:1996-07-09

    摘要: A frequency synthesizer including a phase-locked loop, an oscillator of which supplies n phases with increasing delays of a fast clock signal synchronized on a reference frequency, each of said n phases being sent onto a same number m of fractional dividers having their respective outputs sent onto m jitter compensators which each issue, based on said n phases, a clock signal synchronized on said reference frequency.

    摘要翻译: 一种频率合成器,包括锁相环,其振荡器为在参考频率上同步的快速时钟信号的增加的延迟提供n个相位,所述n个相位中的每一个被发送到具有它们各自的输出的相同数量的分数分频器 发送到m个抖动补偿器,每个抖动补偿器基于所述n个相位发出在所述参考频率上同步的时钟信号。

    Dual port oscillator for two-stage direct conversion receiver
    10.
    发明授权
    Dual port oscillator for two-stage direct conversion receiver 失效
    双端口振荡器,用于两级直接转换接收器

    公开(公告)号:US5263197A

    公开(公告)日:1993-11-16

    申请号:US762759

    申请日:1991-09-20

    摘要: A two-stage direct conversion receiver. A first mixer (13) converts the incoming signal to an intermediate frequency (IF) signal. A second mixer (16) converts the IF signal to a baseband signal. A detector (17), receiver logic circuit (18), and alerting device circuit (19) act upon the baseband output signal. A two port oscillator (14) provides a fundamental frequency output (FO) and a tripled output frequency (3 FO). The tripled output frequency is again tripled (9 FO) by a frequency multiplier (15) and is provided as a mixing signal to the first mixer (13). The fundamental frequency output is provided to a phase locked loop (20, 21, 22). The output frequency (FV) of the phase locked loop is doubled (2 FV) by a frequency multiplier (23) and provided to a phase shift circuit (24). The output of the phase shift circuit (24) is provided as the second mixing signal to the second mixer (16). The phase locked loop comprises a phase locked loop controller (20), a phase locked loop filter (21), and a voltage controlled oscillator (22). The main oscillator (14) is configured as a crystal controlled Colpitts oscillator, which has an emitter resonant circuit selected to produce oscillation at the fundamental frequency, and a collector resonant circuit selected to extract the third harmonic of the fundamental oscillation frequency. A single active device can therefore provide both the fundamental frequency and the third harmonic frequency. Calibration of the receiver is effected by simply tuning the oscillator (14) to produce a baseband output signal at the output of the second mixer (16). Single step calibration is therefore effected because the voltage controlled oscillator (22) is locked to the main oscillator (14).

    摘要翻译: 两级直接转换接收机。 第一混频器(13)将输入信号转换成中频(IF)信号。 第二混频器(16)将IF信号转换为基带信号。 检测器(17),接收器逻辑电路(18)和报警装置电路(19)作用于基带输出信号。 双端口振荡器(14)提供基频输出(FO)和三倍输出频率(3 FO)。 倍增输出频率由倍频器(15)再三倍(9F),并作为混合信号提供给第一混频器(13)。 基频输出被提供给锁相环(20,21,22)。 锁相环的输出频率(FV)由倍频器(23)加倍(2 FV),并提供给相移电路(24)。 将相移电路(24)的输出作为第二混频信号提供给第二混频器(16)。 锁相环包括锁相环控制器(20),锁相环滤波器(21)和压控振荡器(22)。 主振荡器(14)被配置为晶体控制的Colpitts振荡器,其具有选择用于产生基频振荡的发射极谐振电路和选择为提取基波振荡频率的三次谐波的集电极谐振电路。 因此,单个有源器件可以提供基频和三次谐波频率。 通过简单地调谐振荡器(14)来在第二混频器(16)的输出处产生基带输出信号来实现接收机的校准。 因此,单步校准是因为压控振荡器(22)被锁定到主振荡器(14)。