公开(公告)号：US20100219997A1

公开(公告)日：2010-09-02

申请号：US12161532

申请日：2007-01-22

申请人： Yann Le Guillou

发明人： Yann Le Guillou

IPC分类号： H03M3/00

CPC分类号： H03M3/386 ,  H03M3/43 ,  H03M3/448 ,  H03M3/452

摘要： A continuous-time sigma-delta analog-to-digital converter (CV) comprises i) a signal path (SP) comprising at least one combiner (C1) for combining analog signals to convert with feedback analog signals, at least two integrators (H1, H5), mounted in series, to integrate the combined analog signals, a quantizer (Q) for converting the integrated signals into digital signals, and a decimation filter (DF) for filtering digital signals, and ii) a feedback path (FP) comprising at least a digital-to-analog converter (DAC) for converting the digital signals output by the quantizer (Q) into feedback analog signals intended for the combiner (C1). Each integrator (H1, H5) comprises variable capacitance means arranged to be set in chosen states define by the values of a digital word, to present chosen capacitances. The converter (CV) also comprises a self-calibration control means (CCM) arranged a) to generate a digital word with a chosen first value, b) to estimate an in-band noise IBN(n) from the filtered digital signals and to compare this IBN(n) to the preceding IBN(n-1), c) to modify the digital word value to decrease the capacitance of each integrator from a chosen decrement when IBN(n) is smaller than IBN(n-1), d) to iterate steps b) and c) till IBN(n) be greater than IBN(n-1), and to choose as calibration digital word value the value corresponding to IBN(n-1) to set the calibration state of the variable capacitance means.

摘要翻译： 连续时间Σ-Δ模数转换器（CV）包括：i）信号路径（SP），包括用于组合模拟信号以与反馈模拟信号进行转换的至少一个组合器（C1），至少两个积分器 ，H5），用于集成组合的模拟信号，用于将积分信号转换为数字信号的量化器（Q）和用于对数字信号进行滤波的抽取滤波器（DF），以及ii）反馈路径（FP） 至少包括用于将由量化器（Q）输出的数字信号转换成用于组合器（C1）的反馈模拟信号的数模转换器（DAC）。 每个积分器（H1，H5）包括可变电容装置，其被布置为被设置为以数字字的值定义的选定状态，以呈现所选择的电容。 转换器（CV）还包括一个自校准控制装置（CCM），其被配置为a）产生具有所选择的第一值的数字字，b）从滤波后的数字信号估计带内噪声IBN（n） 将IBN（n）与先前的IBN（n-1）进行比较，c）当IBN（n）小于IBN（n-1）时，修改数字字值以减小每个积分器的电容从所选择的减量， d）迭代步骤b）和c），直到IBN（n）大于IBN（n-1），并选择对应于IBN（n-1）的校准数字字值，以设置校正状态 可变电容装置。

公开(公告)号：US09325927B2

公开(公告)日：2016-04-26

申请号：US12865991

申请日：2009-02-03

申请人： Yann Le Guillou

发明人： Yann Le Guillou

IPC分类号： H04B1/06 ,  H04N5/455 ,  H03L7/197 ,  H03L7/23 ,  H04N21/61 ,  H04N21/426

CPC分类号： H04N5/455 ,  H03L7/1976 ,  H03L7/23 ,  H04N21/4263 ,  H04N21/42676 ,  H04N21/6118

摘要： A method of operating a multi-stream reception scheme, such as DOCSIS (Data Over Cable Service Interface Specifications), comprising at least two receivers (10, 12, 14) having respective voltage controlled oscillators (16), the method including monitoring a change in local oscillator frequency in a selected one of the at least two streams and, if the frequency distance between the local oscillator frequencies is below a value likely to cause pulling or coupling between the voltage controlled oscillators of the at least two receivers, resetting the frequency planning of the selected one of the at least two streams to maximize the frequency distance of the voltage controlled oscillator of the selected stream with the voltage controlled oscillators of the or the other streams.

摘要翻译： 一种操作诸如DOCSIS（Data Over Cable Service Interface Specifications）的多流接收方案的方法，包括至少两个具有各自的压控振荡器（16）的接收器（10,12,14），该方法包括监视变化 在所述至少两个流中所选择的一个中的本地振荡器频率中，并且如果所述本地振荡器频率之间的频率距离低于可能导致所述至少两个接收机的压控振荡器之间的拉或耦合的值，则重置所述频率 规划所述至少两个流中所选择的一个流，以使所选择的流的压控振荡器的频率距离与所述或其它流的压控振荡器最大化。

公开(公告)号：US08457568B2

公开(公告)日：2013-06-04

申请号：US12529735

申请日：2008-02-18

申请人： Yann Le Guillou ,  Volker Aue

发明人： Yann Le Guillou ,  Volker Aue

IPC分类号： H03C1/62

CPC分类号： H04B1/525

摘要： In a method for processing a signal received by a receiver, at a first wireless receiver (20, 62) a first signal (x(t), x1(t)) comprising first and second signal components is received. The first signal component is intended for the first wireless receiver (20, 62) and the second signal component is related to at least one of a sending signal (s(t)) generated by a transmitter (29, 69) or to a second signal (x2(t)) intended for a second wireless receiver (61). To the first wireless receiver (20, 62) a reference signal (r(t), r1(t), r2(t)) which is proportional to the sending signal (s(t)) or to the second signal (x2(t)). At the first wireless receiver (20, 62) and from the reference signal (r(t), r1(t), r2(t)) an estimation signal which estimates the second signal component is generated. A filtered signal (y(t), y1(t)) is generated by subtracting the estimation signal from the first signal (x(t), x1(t)).

摘要翻译： 在用于处理由接收机接收的信号的方法中，在第一无线接收机（20,62）处，接收包括第一和第二信号分量的第一信号（x（t），x1（t））。 第一信号分量用于第一无线接收机（20,62），第二信号分量与由发射机（29,69）或第二无线接收机产生的发送信号（s（t））中的至少一个有关， 用于第二无线接收器（61）的信号（x2（t））。 对于第一无线接收机（20,62），与发送信号（s（t））成比例的参考信号（r（t），r1（t），r2（t））或与第二信号 t））。 在第一无线接收机（20,62）和从参考信号（r（t），r1（t），r2（t））产生估计第二信号分量的估计信号。 通过从第一信号（x（t），x1（t））减去估计信号来生成滤波信号（y（t），y1（t））。

公开(公告)号：US08183971B2

公开(公告)日：2012-05-22

申请号：US12936982

申请日：2009-04-02

申请人： Yann Le Guillou ,  Bassem Fahs

发明人： Yann Le Guillou ,  Bassem Fahs

IPC分类号： H01F5/00 ,  H01F27/28

CPC分类号： H01F17/0006 ,  H01F27/346 ,  H01F2017/0073 ,  H01F2017/0086 ,  H03B5/1841

摘要： In a first aspect, the invention provides to a device comprising a substrate and an electrical conductor arranged between two terminals (A, B) and shaped for forming an inductor comprising at least two loops (1, 2) and arranged such that, at least locally, the far field is reduced. This arrangement results in an inductor which radiates a smaller magnetic field, also referred to as reduced EMI, which results in less noise generated in other inductive parts of an electronic circuit or system. The invention further provides in an advantageous embodiment proper balancing of the parasitic resistance and capacitance. By doing so the physical mid-point of 8-shaped inductors becomes the electrical mid-point (MP) which is beneficial when the inductor is used in a circuit. In a second aspect the invention provides an electronic system comprising the device according to the invention, wherein the electronic system comprises an LC-based voltage-controlled oscillator comprising the inductor, the electronic system being one of a group comprising: a multi-channel TV-receiver, a full-duplex transceiver, and a co-banding system. All these systems benefit from the symmetrical properties of the inductor. The better far-field compensation leads to a smaller VCO pulling effect which leads to a better performance of the system.

摘要翻译： 在第一方面，本发明提供了一种装置，其包括衬底和布置在两个端子（A，B）之间的电导体，并且成形为用于形成包括至少两个环（1,2）的电感器并且被布置成使得至少 在当地，远场减少。 这种布置导致电感器辐射较小的磁场，也被称为减小的EMI，这导致在电子电路或系统的其它电感部分中产生的较少的噪声。 本发明还在有利的实施例中提供了寄生电阻和电容的适当平衡。 通过这样做，8形电感器的物理中点成为电中点（MP），这在电路中使用电感时是有益的。 在第二方面，本发明提供了一种包括根据本发明的装置的电子系统，其中电子系统包括基于LC的压控振荡器，该振荡器包括电感器，该电子系统是以下组中的一个：多通道电视 接收器，全双工收发器和共带系统。 所有这些系统都受益于电感器的对称性质。 更好的远场补偿导致更小的VCO拉动效应，这导致系统的更好的性能。

公开(公告)号：US20110002424A1

公开(公告)日：2011-01-06

申请号：US12865991

申请日：2009-02-03

申请人： Yann Le Guillou

发明人： Yann Le Guillou

IPC分类号： H04L27/06

CPC分类号： H04N5/455 ,  H03L7/1976 ,  H03L7/23 ,  H04N21/4263 ,  H04N21/42676 ,  H04N21/6118

摘要： A method of operating a multi-stream reception scheme, such as DOCSIS (Data Over Cable Service Interface Specifications), comprising at least two receivers (10, 12, 14) having respective voltage controlled oscillators (16), the method including monitoring a change in local oscillator frequency in a selected one of the at least two streams and, if the frequency distance between the local oscillator frequencies is below a value likely to cause pulling or coupling between the voltage controlled oscillators of the at least two receivers, resetting the frequency planning of the selected one of the at least two streams to maximise the frequency distance of the voltage controlled oscillator of the selected stream with the voltage controlled oscillators of the or the other streams.

摘要翻译： 一种操作诸如DOCSIS（Data Over Cable Service Interface Specifications）的多流接收方案的方法，包括至少两个具有各自的压控振荡器（16）的接收器（10,12,14），该方法包括监视变化 在所述至少两个流中所选择的一个中的本地振荡器频率中，并且如果所述本地振荡器频率之间的频率距离低于可能导致所述至少两个接收机的压控振荡器之间的拉或耦合的值，则重置所述频率 规划所述至少两个流中所选择的一个流，以使所选择的流的压控振荡器的频率距离与所述或其它流的压控振荡器最大化。

公开(公告)号：US08396427B2

公开(公告)日：2013-03-12

申请号：US13125050

申请日：2009-10-07

申请人： Yann Le Guillou ,  Frederic Pirot ,  Sebastien Amiot

发明人： Yann Le Guillou ,  Frederic Pirot ,  Sebastien Amiot

IPC分类号： H04B1/00 ,  H04B15/00

CPC分类号： H04B1/1036

摘要： A system and method provide adaptive filtering of radio frequency (RF) signals. Multiple signals are received in a predetermined RF spectrum, the signals including a desired signal and multiple potentially interfering signals. A first signal of the potentially interfering signals is down-converted to a baseband signal, and a power of the baseband signal is determined. When the power exceeds a predetermined threshold power, a first notch filter, corresponding to a frequency of the first signal, is activated.

摘要翻译： 一种系统和方法提供射频（RF）信号的自适应滤波。 在预定的RF频谱中接收多个信号，该信号包括期望的信号和多个潜在的干扰信号。 潜在干扰信号的第一信号被下变频为基带信号，并确定基带信号的功率。 当功率超过预定阈值功率时，对应于第一信号的频率的第一陷波滤波器被激活。

公开(公告)号：US08217683B2

公开(公告)日：2012-07-10

申请号：US13060914

申请日：2009-08-25

申请人： Yann Le Guillou

发明人： Yann Le Guillou

IPC分类号： H03D13/00

CPC分类号： H03D13/008 ,  H03L7/0812

摘要： A basic symmetric Π/2 phase-detector receives four control signals that control a differential current at the detector's output. Each respective control signal is a linear combination of a respective pair of signals chosen from a first input signal, its logic complement, a second input signal and the logic complement of the latter. Operation is based on time-averaging the differential current, the result being zero at a phase difference of Π/2. By means of adding one or more additional current sources to the output, controlled by one or more of the control signals, the basic operation is skewed. The time-averaged output current is now made zero only at a value of the phase difference different from Π/2. In an embodiment with uniform current sources and resistors, the modified detector is configured for a phase difference of Π/2N .

摘要翻译： 基本的对称＆Pgr / / 2相位检测器接收四个控制信号，控制检测器输出端的差分电流。 每个相应的控制信号是从第一输入信号，其逻辑补码，第二输入信号和后者的逻辑补码中选出的相应的一对信号的线性组合。 操作基于对差分电流进行时间平均，结果在相位差为＆Pgr / 2时为零。 通过将一个或多个附加电流源添加到输出中，由一个或多个控制信号控制，基本操作是偏斜的。 时间平均输出电流现在仅在与＆Pgr; / 2不同的相位差的值为零。 在具有均匀电流源和电阻器的实施例中，经修改的检测器被配置为相位差为＆amp; N 2N。

公开(公告)号：US07944385B2

公开(公告)日：2011-05-17

申请号：US12161532

申请日：2007-01-22

申请人： Yann Le Guillou

发明人： Yann Le Guillou

IPC分类号： H03M3/00

CPC分类号： H03M3/386 ,  H03M3/43 ,  H03M3/448 ,  H03M3/452

摘要： A continuous-time sigma-delta analog-to-digital converter (CV) including i) a signal path (SP) having at least one combiner (C1) for combining analog signals to convert with feedback analog signals, at least two integrators (H1, H5), mounted in series, to integrate the combined analog signals, a quantizer (Q) for converting the integrated signals into digital signals, and a decimation filter (DF) for filtering digital signals, and ii) a feedback path (FP) having at least a digital-to-analog converter (DAC) for converting the digital signals output by the quantizer (Q) into feedback analog signals intended for the combiner (C1). Each integrator (H1, H5) having variable capacitance means arranged to be set in chosen states defined by the values of a digital word, to present the chosen capacitances.

摘要翻译： 一种连续时间Σ-Δ模数转换器（CV），包括i）具有至少一个用于组合模拟信号以与反馈模拟信号一起转换的组合器（C1）的信号路径（SP），至少两个积分器 ，H5），用于集成组合的模拟信号，用于将积分信号转换为数字信号的量化器（Q）和用于对数字信号进行滤波的抽取滤波器（DF），以及ii）反馈路径（FP） 具有用于将由量化器（Q）输出的数字信号转换成用于组合器（C1）的反馈模拟信号的至少一个数模转换器（DAC）。 具有可变电容装置的每个积分器（H1，H5）被布置成被设置在由数字字的值定义的选定状态中，以呈现所选择的电容。

公开(公告)号：US20110032067A1

公开(公告)日：2011-02-10

申请号：US12936982

申请日：2009-04-02

申请人： Yann Le Guillou ,  Bassem Fahs

发明人： Yann Le Guillou ,  Bassem Fahs

IPC分类号： H01F5/00

CPC分类号： H01F17/0006 ,  H01F27/346 ,  H01F2017/0073 ,  H01F2017/0086 ,  H03B5/1841

摘要： In a first aspect, the invention provides to a device comprising a substrate and an electrical conductor arranged between two terminals (A, B) and shaped for forming an inductor comprising at least two loops (1, 2) and arranged such that, at least locally, the far field is reduced. This arrangement results in an inductor which radiates a smaller magnetic field, also referred to as reduced EMI, which results in less noise generated in other inductive parts of an electronic circuit or system. The invention further provides in an advantageous embodiment proper balancing of the parasitic resistance and capacitance. By doing so the physical mid-point of 8-shaped inductors becomes the electrical mid-point (MP) which is beneficial when the inductor is used in a circuit. In a second aspect the invention provides an electronic system comprising the device according to the invention, wherein the electronic system comprises an LC-based voltage-controlled oscillator comprising the inductor, the electronic system being one of a group comprising: a multi-channel TV-receiver, a full-duplex transceiver, and a co-banding system. All these systems benefit from the symmetrical properties of the inductor. The better far-field compensation leads to a smaller VCO pulling effect which leads to a better performance of the system.

摘要翻译： 在第一方面，本发明提供了一种装置，其包括衬底和布置在两个端子（A，B）之间的电导体，并且成形为用于形成包括至少两个环（1,2）的电感器并且被布置成使得至少 在当地，远场减少。 这种布置导致电感器辐射较小的磁场，也被称为减小的EMI，这导致在电子电路或系统的其它电感部分中产生的较少的噪声。 本发明还在有利的实施例中提供了寄生电阻和电容的适当平衡。 通过这样做，8形电感器的物理中点成为电中点（MP），这在电路中使用电感时是有益的。 在第二方面，本发明提供了一种包括根据本发明的装置的电子系统，其中电子系统包括基于LC的压控振荡器，该振荡器包括电感器，该电子系统是以下组中的一个：多通道电视 接收器，全双工收发器和共带系统。 所有这些系统都受益于电感器的对称性质。 更好的远场补偿导致更小的VCO拉动效应，这导致系统的更好的性能。

公开(公告)号：US07554474B2

公开(公告)日：2009-06-30

申请号：US12096210

申请日：2006-12-04

申请人： Yann Le Guillou

发明人： Yann Le Guillou

IPC分类号： H03M3/00

CPC分类号： H03M3/368 ,  H03M3/43 ,  H03M3/452

摘要： The present invention relates to a receiver apparatus, analog-to-digital converter apparatus, and method of converting an analog input signal into a digital output signal, wherein an additional direct feedforward path is introduced to compensate for peaking of feedforward structures while preserving frequency selectivity of the feedforward topology. In particular, the direct feedforward path (72) is provided with a scaling by a direct feedforward coefficient (ao) greater than zero and less than one. As a result, overshoot or peaking of classical feedforward topologies can be suppressed while providing interferer immunity, anti-aliazing effects and loop stability.

摘要翻译： 本发明涉及一种接收机装置，模拟 - 数字转换器装置和将模拟输入信号转换为数字输出信号的方法，其中引入附加的直接前馈路径来补偿前馈结构的峰值，同时保持频率选择性 的前馈拓扑。 特别地，直接前馈路径（72）具有大于零且小于1的直接前馈系数（ao）的缩放。 因此，可以抑制经典前馈拓扑的过冲或峰化，同时提供干扰源抗扰度，抗融合效应和环路稳定性。