Bifurcated polysilicon gate electrodes and fabrication methods
    1.
    发明授权
    Bifurcated polysilicon gate electrodes and fabrication methods 失效
    分叉多晶硅栅电极及其制造方法

    公开(公告)号:US5736772A

    公开(公告)日:1998-04-07

    申请号:US633450

    申请日:1996-04-17

    CPC分类号: H01L27/0629 H01L27/0251

    摘要: A polysilicon gate electrode of an integrated circuit field effect transistor is formed in two portions which are isolated from one another. The first portion is formed on the gate insulating region. The second portion is formed on the semiconductor substrate outside the gate insulating region and is electrically insulated from the first portion. Since the first and second portions of the polysilicon gate electrode are isolated from one another, only the charge which is on the first polysilicon portion contributes to gate insulating region degradation during plasma etching. After polysilicon gate electrode formation, the first and second portions may be electrically connected by a link. Field effect transistor performance and/or reliability are thereby increased.

    摘要翻译: 集成电路场效应晶体管的多晶硅栅电极形成为彼此隔离的两部分。 第一部分形成在栅绝缘区上。 第二部分形成在栅极绝缘区域外部的半导体衬底上,并与第一部分电绝缘。 由于多晶硅栅电极的第一部分和第二部分彼此隔离,所以在等离子体蚀刻期间仅仅第一多晶硅部分上的电荷有助于栅极绝缘区域的劣化。 在多晶硅栅电极形成之后,第一和第二部分可以通过链路电连接。 从而增加场效应晶体管的性能和/或可靠性。

    Nonvolatile semiconductor memories with a cell structure suitable for a
high speed operation and a low power supply voltage
    2.
    发明授权
    Nonvolatile semiconductor memories with a cell structure suitable for a high speed operation and a low power supply voltage 失效
    具有适用于高速运行和低电源电压的电池结构的非易失性半导体存储器

    公开(公告)号:US5635747A

    公开(公告)日:1997-06-03

    申请号:US481098

    申请日:1995-06-07

    摘要: A nonvolatile semiconductor memory with a unit cell structure suitable for high speed operation and a low power supply voltage. The nonvolatile semiconductor memory includes a switching circuit including block select transistors connected by its respective terminal to a corresponding bit line. This switching circuit transmits a signal only when a string to which the switching circuit corresponds is selected. A second active region having a different impurity concentration from a first active region constituting source and drain regions of memory transistors is formed at a substrate contact portion of a bit line contact portion where the memory string and bit line are connected. The impurity concentration of the second active region is lower than that of the first active region.

    摘要翻译: 具有适用于高速运行和低电源电压的单元结构的非易失性半导体存储器。 非易失性半导体存储器包括切换电路,其包括通过其相应端子连接到相应位线的块选择晶体管。 该切换电路仅在选择与开关电路对应的串时发送信号。 在构成存储晶体管的源区和漏区的第一有源区具有不同杂质浓度的第二有源区形成在连接存储器串和位线的位线接触部的衬底接触部分。 第二有源区的杂质浓度低于第一有源区的杂质浓度。

    Nonvolatile semiconductor memories with a cell structure suitable for a
high speed operation and a low power supply voltage
    3.
    发明授权
    Nonvolatile semiconductor memories with a cell structure suitable for a high speed operation and a low power supply voltage 失效
    具有适用于高速运行和低电源电压的电池结构的非易失性半导体存储器

    公开(公告)号:US5528537A

    公开(公告)日:1996-06-18

    申请号:US505038

    申请日:1995-07-21

    摘要: A nonvolatile semiconductor memory with a unit cell structure suitable for high speed operation and a low power supply voltage. The nonvolatile semiconductor memory includes a switching circuit including block select transistors connected by its respective terminal to a corresponding bit line. This switching circuit transmits a signal only when a string to which the switching circuit corresponds is selected. A second active region having a different impurity concentration from a first active region constituting source and drain regions of memory transistors is formed at a substrate contact portion of a bit line contact portion where the memory string and bit line are connected. The impurity concentration of the second active region is lower than that of the first active region.

    摘要翻译: 具有适用于高速运行和低电源电压的单元结构的非易失性半导体存储器。 非易失性半导体存储器包括切换电路,其包括通过其相应端子连接到相应位线的块选择晶体管。 该切换电路仅在选择与开关电路对应的串时发送信号。 在构成存储晶体管的源区和漏区的第一有源区具有不同杂质浓度的第二有源区形成在连接存储器串和位线的位线接触部的衬底接触部分。 第二有源区的杂质浓度低于第一有源区的杂质浓度。