CASH PAYMENT LINKING METHOD USING ACCUMULATION OF DOUBLE SALES MARGIN, AND LINKING SYSTEM THEREOF

    公开(公告)号:US20170243240A1

    公开(公告)日:2017-08-24

    申请号:US15519382

    申请日:2015-06-24

    IPC分类号: G06Q30/02 G06Q20/12 G06Q30/06

    摘要: Disclosed are a double deozoom margin management method and a system for performing the same, which increase mutual sales among a corresponding business owner's own business and rival businesses or among heterogeneous businesses via cross promotion and sales support among heterogeneous businesses or homogeneous businesses. The double deozoom margin management system includes a web server, a deozoom margin accumulation server, and a purchase service provision server. The deozoom margin accumulation server enables deozoom margins to be accumulated among deozoom designated shops. The purchase service provision server: (i) identifies an identification code of a corresponding designated shop when a general purchase has been requested; (ii) issues and accumulates a previously agreed deozoom margin; (iii), stores a deozoom margin of a purchaser and also stores a deozoom margin for settlement when an offline purchase via a point card has been requested; and (iv) does subtraction from a deozoom margin of a member.

    SEMICONDUCTOR MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE SAME, AND METHOD OF OPERATING THE SAME
    2.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE SAME, AND METHOD OF OPERATING THE SAME 有权
    半导体存储器件,包括其的存储器系统及其操作方法

    公开(公告)号:US20160034371A1

    公开(公告)日:2016-02-04

    申请号:US14730632

    申请日:2015-06-04

    IPC分类号: G06F11/20 G06F3/06

    摘要: A semiconductor memory device includes a memory cell array including a plurality of cell cores which include a first cell core corresponding to a first channel that is a normal channel and a second cell core corresponding to a second channel that is a failed channel; and an access circuit configured to perform address remapping by converting a first address of at least a first failed cell in the first cell core into a second address of at least a second cell in the second cell core, and to transmit data of at least the second cell through the first channel.

    摘要翻译: 一种半导体存储器件包括存储单元阵列,该存储单元阵列包括多个单元核心,所述多个单元核心包括对应于作为正常通道的第一通道的第一单元核心和对应于作为故障通道的第二通道的第二单元核心; 以及接入电路,被配置为通过将所述第一小区核心中的至少第一故障小区的第一地址转换为所述第二小区核心中的至少第二小区的第二地址来执行地址重新映射,并且至少发送 第二个单元格通过第一个通道。

    Photomask and thin-film transistor fabricated using the photomask
    3.
    发明授权
    Photomask and thin-film transistor fabricated using the photomask 有权
    使用光掩模制造的光掩模和薄膜晶体管

    公开(公告)号:US08680527B2

    公开(公告)日:2014-03-25

    申请号:US12978446

    申请日:2010-12-24

    IPC分类号: H01L29/417

    摘要: A photomask includes; a source electrode pattern including; a first electrode portion which extends in a first direction, a second electrode portion which extends in the first direction and is substantially parallel to the first electrode portion, and a third electrode portion which extends from a first end of the first electrode portion to a first end of the second electrode portion and is rounded with a first curvature, a drain electrode pattern which extends in the first direction and is disposed between the first electrode portion and the second electrode portion, wherein an end of the drain electrode pattern is rounded to correspond to the third electrode portion; and a channel region pattern which is disposed between the source electrode pattern and the drain electrode pattern, wherein a center location of the first curvature and a center location of the rounded portion of the end of the drain electrode pattern are the same.

    摘要翻译: 光掩模包括; 源电极图案,包括: 沿第一方向延伸的第一电极部分,沿第一方向延伸并基本上平行于第一电极部分的第二电极部分,以及从第一电极部分的第一端延伸到第一电极部分的第三电极部分, 并且以第一曲率圆形化,漏电极图案,其沿第一方向延伸并且设置在第一电极部分和第二电极部分之间,其中漏极电极图案的端部被圆化以对应 到所述第三电极部分; 以及设置在源极电极图案和漏极电极图案之间的沟道区域图案,其中第一曲率的中心位置和漏极电极图案的端部的圆形部分的中心位置相同。

    Display device
    4.
    发明授权
    Display device 有权
    显示设备

    公开(公告)号:US08670101B2

    公开(公告)日:2014-03-11

    申请号:US12471902

    申请日:2009-05-26

    IPC分类号: G02F1/1345

    摘要: A display device according to an exemplary embodiment of the present invention includes: a substrate, a plurality of gate lines formed on the substrate, a plurality of data lines formed on the substrate, a plurality of switching elements connected to the gate lines and the data lines, a plurality of clock signal transmitting lines formed on the substrate, and a gate driver connected to the gate lines and the clock signal transmitting lines. A direction of each of the clock signal transmitting lines is changed approximately ninety degrees in a first region and a second region. The regions are disposed between an edge of the substrate and the gate driver. A symmetry is present between portions of the clock signal transmitting lines arranged in the first region and the second region.

    摘要翻译: 根据本发明的示例性实施例的显示装置包括:基板,形成在基板上的多个栅极线,形成在基板上的多条数据线,连接到栅极线的多个开关元件和数据 线,形成在基板上的多个时钟信号传输线,以及连接到栅极线和时钟信号传输线的栅极驱动器。 每个时钟信号传输线的方向在第一区域和第二区域中改变大约九十度。 这些区域设置在基板的边缘和栅极驱动器之间。 布置在第一区域和第二区域中的时钟信号传输线路的部分之间存在对称性。

    Thin film transistor array panel and method of manufacturing the same
    6.
    发明授权
    Thin film transistor array panel and method of manufacturing the same 有权
    薄膜晶体管阵列面板及其制造方法

    公开(公告)号:US08610858B2

    公开(公告)日:2013-12-17

    申请号:US12842580

    申请日:2010-07-23

    IPC分类号: G02F1/1343

    摘要: A liquid crystal display device that is in a normally black mode where a screen is black when a voltage difference between a first insulating substrate and a second insulating substrate is zero, wherein a column spacer is positioned between the two substrates and the column spacer is in contact with a common voltage conductor pattern formed on the first insulating substrate and a common electrode formed on the second insulating substrate, such that a voltage difference between the common voltage conductor pattern and the common electrode is zero.

    摘要翻译: 一种液晶显示装置,当第一绝缘基板和第二绝缘基板之间的电压差为零时处于黑色的常黑模式,其中列间隔件位于两个基板之间,柱间隔件处于 与形成在第一绝缘基板上的公共电压导体图案和形成在第二绝缘基板上的公共电极接触,使得公共电压导体图案和公共电极之间的电压差为零。

    TWO SOLENOID VALVE RELAY TWO-STAGE FUEL INJECTION VALVE FOR DIESEL ENGINES
    8.
    发明申请
    TWO SOLENOID VALVE RELAY TWO-STAGE FUEL INJECTION VALVE FOR DIESEL ENGINES 有权
    两个电磁阀继电器柴油发动机两级燃油喷射阀

    公开(公告)号:US20130037004A1

    公开(公告)日:2013-02-14

    申请号:US13642276

    申请日:2010-10-26

    IPC分类号: F02M69/04

    摘要: The present invention provides a two solenoid valve relay with a two-phase fuel injection valve for a diesel engine, which is installed on a valve itself to enable injection at pressure greater than opening pressure, at which the fuel enters into a fuel valve, thereby improving fuel injection performance, and which is configured to enable adjustment of an injection timing at the opening pressure within the valve, wherein injection timings through a solenoid valve is provided for low load and high load, respectively, such that a distinct difference exists between the injection timings to open the nozzle hole of the nozzle in a differential manner at pressure higher than the pressure, at which the fuel enters to the fuel valve and internal spring opening pressure, thereby injecting fuel at high pressure even at low load to facilitate vaporization, and wherein, in case of a high speed operation or high load, low pressure/high pressure needle valves are opened at the same time to quickly inject fuel of a high volume through a plurality of nozzle holes, thereby improving combustion performance of an engine, and wherein a space between the needle valve and the nozzle hole which are closed after the injection is minimized because the nozzle hole is opened differentially and sequentially according to pressure, thereby avoiding waste of fuel and reducing harmful gas (smoke, Nox).

    摘要翻译: 本发明提供了一种具有用于柴油发动机的两相燃料喷射阀的两个电磁阀继电器,该电磁阀继电器安装在阀本身上以能够在大于开启压力的压力下喷射燃料进入燃料阀,由此 提高燃料喷射性能,并且其被配置为能够调节阀内的打开压力下的喷射正时,其中通过电磁阀分别为低负载和高负载提供喷射定时,使得在 喷射正时以不同于燃料进入燃料阀的压力和内部弹簧开启压力的压力以不同的方式打开喷嘴的喷嘴孔,从而甚至在低负载下高压喷射燃料以促进汽化, 并且其中,在高速运转或高负载的情况下,低压/高压针阀同时打开以快速地 通过多个喷嘴孔大体积的喷射燃料,从而改善发动机的燃烧性能,并且其中在喷射之后关闭的针阀和喷嘴孔之间的空间被最小化,因为喷嘴孔差异地并且顺序地打开 根据压力,从而避免燃料的浪费和减少有害气体(烟雾,Nox)。

    Method of forming photoresist burr edge and method of manufacturing array substrate
    9.
    发明授权
    Method of forming photoresist burr edge and method of manufacturing array substrate 有权
    形成光致抗蚀剂毛边的方法和阵列基板的制造方法

    公开(公告)号:US08298883B2

    公开(公告)日:2012-10-30

    申请号:US12503977

    申请日:2009-07-16

    IPC分类号: H01L21/00 H01L21/84

    摘要: A method of forming a photoresist burr edge and a method of manufacturing an array substrate are provided in the present invention. The method of manufacturing an array substrate comprises: forming a gate line and a gate electrode on a substrate; forming a data line, a source electrode, a drain electrode and a TFT channel region without removing the photoresist on the data line, the source electrode and the drain electrode; depositing a passivation layer; removing the remained photoresist and the passivation layer thereon by a lifting-off process; applying a photoresist layer; forming a photoresist burr edge of peak shape; depositing a transparent conductive film; forming a pixel electrode by a lifting-off process, wherein the pixel electrode is directly connected with the drain electrode.

    摘要翻译: 在本发明中提供了形成光致抗蚀剂毛边的方法和阵列基板的制造方法。 制造阵列基板的方法包括:在基板上形成栅极线和栅电极; 形成数据线,源电极,漏电极和TFT沟道区,而不去除数据线,源电极和漏电极上的光致抗蚀剂; 沉积钝化层; 通过提升过程在其上去除残留的光致抗蚀剂和钝化层; 施加光致抗蚀剂层; 形成峰形的光致抗蚀剂毛刺边缘; 沉积透明导电膜; 通过提升处理形成像素电极,其中像素电极与漏电极直接连接。