公开(公告)号：US20190129651A1

公开(公告)日：2019-05-02

申请号：US15794457

申请日：2017-10-26

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： John WUU ,  Michael K. CIRAULA ,  Russell SCHREIBER ,  Samuel NAFFZIGER

IPC: G06F3/06 ,  G06F12/1009

Abstract: A processing system includes a compute die and a stacked memory stacked with the compute die. The stacked memory includes a first memory die and a second memory die stacked on top of the first memory die. A parallel access using a single memory address is directed towards different memory banks of the first memory die and the second memory die. The single memory address of the parallel access is swizzled to access the first memory die and the second memory die at different physical locations.

公开(公告)号：US20210043250A1

公开(公告)日：2021-02-11

申请号：US16996024

申请日：2020-08-18

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： John WUU ,  Martin Paul PIORKOWSKI

IPC: G11C11/419

Abstract: A method for operating a memory device includes initiating an access operation to a corresponding row of an array of bit cells of the memory device. Responsive to an expansion mode signal having a first state, the method further includes dynamically operating each column of a plurality of columns of the array to access each bit cell of a corresponding row within the plurality of columns during the access operation. Alternatively, responsive to the expansion mode state signal having a second state different than the first state, the method includes dynamically operating each column of a first subset of columns of the plurality of columns to access each bit cell of a corresponding row within the first subset of columns during the access operation, and maintaining each column of a second subset of columns of the plurality of columns in a static state during the access operation.

公开(公告)号：US20220189921A1

公开(公告)日：2022-06-16

申请号：US17121039

申请日：2020-12-14

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： John WUU ,  David JOHNSON

IPC: H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  H02M3/04 ,  H03K19/20

Abstract: A stacked die system includes at least three dies. A first die has a same design as a second die. The first die includes a first circuit, and the second die includes a corresponding second circuit. A signal is received at the first die and sent to the third die via the second die. The signal is routed through either the first circuit or the second circuit but not both. Accordingly, an operation is performed on the signal prior to the signal reaching the third die but the operation is not performed by both the first circuit and the second circuit.

公开(公告)号：US20190172525A1

公开(公告)日：2019-06-06

申请号：US15830176

申请日：2017-12-04

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： John WUU ,  Martin Paul Piorkowski

IPC: G11C11/419

Abstract: A method for operating a memory device includes initiating an access operation to a corresponding row of an array of bit cells of the memory device. Responsive to an expansion mode signal having a first state, the method further includes dynamically operating each column of a plurality of columns of the array to access each bit cell of a corresponding row within the plurality of columns during the access operation. Alternatively, responsive to the expansion mode state signal having a second state different than the first state, the method includes dynamically operating each column of a first subset of columns of the plurality of columns to access each bit cell of a corresponding row within the first subset of columns during the access operation, and maintaining each column of a second subset of columns of the plurality of columns in a static state during the access operation.

公开(公告)号：US20230207527A1

公开(公告)日：2023-06-29

申请号：US17564137

申请日：2021-12-28

Applicant: ADVANCED MICRO DEVICES, INC. ,  ATI TECHNOLOGIES ULC

Inventor： Wonjun JUNG ,  Jasmeet SINGH NARANG ,  Tyrone HUANG ,  Christopher KLEMENT ,  Alan D. SMITH ,  Edward CHANG ,  John WUU

IPC: H01L25/065 ,  H01L23/48

CPC classification number: H01L25/0657 ,  H01L23/481 ,  H01L25/0652 ,  H01L2225/06544

Abstract: Integrated circuits and integrated circuit dies include TSVs laid out in symmetrical patterns. Because of the symmetrical arrangement of the TSVs and associated routing patterns, an integrated circuit is able to support operation of multiple similar dies that are placed in different positions in the integrated circuit. This in turn simplifies the design and production of the multiple similar dies, thus reducing development and manufacturing costs for the corresponding integrated circuits.

公开(公告)号：US20220148650A1

公开(公告)日：2022-05-12

申请号：US17530815

申请日：2021-11-19

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： John WUU ,  Martin Paul PIORKOWSKI

IPC: G11C11/419

Abstract: A method for operating a memory device includes initiating an access operation to a corresponding row of an array of bit cells of the memory device. Responsive to an expansion mode signal having a first state, the method further includes dynamically operating each column of a plurality of columns of the array to access each bit cell of a corresponding row within the plurality of columns during the access operation. Alternatively, responsive to the expansion mode state signal having a second state different than the first state, the method includes dynamically operating each column of a first subset of columns of the plurality of columns to access each bit cell of a corresponding row within the first subset of columns during the access operation, and maintaining each column of a second subset of columns of the plurality of columns in a static state during the access operation.