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    Controlling access to pages in a memory in a computing device
    1.
    发明授权
    Controlling access to pages in a memory in a computing device 有权

    公开(公告)号：US10585805B2

    公开(公告)日：2020-03-10

    申请号：US15907593

    申请日：2018-02-28

    Applicant: Advanced Micro Devices, Inc.

    Inventor： David A. Kaplan ,  Jeremy W. Powell ,  Thomas R. Woller

    IPC: G06F12/10 ,  G06F12/1009 ,  G06F9/455

    Abstract: A computing device that handles address translations is described. The computing device includes a hardware table walker and a memory that stores a reverse map table and a plurality of pages of memory. The table walker is configured to use validated indicators in entries in the reverse map table to determine if page accesses are made to pages for which entries are validated. The table walker is further configured to use virtual machine permissions levels information in entries in the reverse map table determine if page accesses for specified operation types are permitted.

    Controlling access to pages in a memory in a computing device
    2.
    发明授权
    Controlling access to pages in a memory in a computing device 有权

    公开(公告)号：US10241931B2

    公开(公告)日：2019-03-26

    申请号：US15417632

    申请日：2017-01-27

    Applicant: Advanced Micro Devices, Inc.

    Inventor： David A. Kaplan ,  Jeremy W. Powell ,  Thomas R. Woller

    IPC: G06F12/14 ,  G06F12/1009 ,  G06F9/52 ,  G06F9/455

    Abstract: A table walker receives, from a requesting entity, a request to translate a first address into a second address associated with a page of memory. During a corresponding table walk, when a lock indicator in an entry in a reverse map table (RMT) for the page is set to mark the entry in the RMT as locked, the table walker halts processing the request and performs a remedial action. In addition, when the request is associated with a write access of the page and an immutable indicator in the entry in the RMT is set to mark the page as immutable, the table walker halts processing the request and performs the remedial action. Otherwise, when the entry in the RMT is not locked and the page is not marked as immutable for a write access, the table walker continues processing the request.

    Controlling Access to Pages in a Memory in a Computing Device
    4.
    发明申请
    Controlling Access to Pages in a Memory in a Computing Device 审中-公开

    公开(公告)号：US20180032443A1

    公开(公告)日：2018-02-01

    申请号：US15224302

    申请日：2016-07-29

    Applicant: Advanced Micro Devices, Inc.

    Inventor： David A. Kaplan ,  Jeremy W. Powell ,  Thomas R. Woller

    IPC: G06F12/1027 ,  G06F9/455 ,  G06F12/1009

    CPC classification number: G06F12/1027 ,  G06F9/45558 ,  G06F12/1009 ,  G06F2009/45583 ,  G06F2212/657 ,  G06F2212/68

    Abstract: The described embodiments perform a method for handling memory accesses by virtual machines in a computing device. The described embodiments include a reverse map table (RMT) and a separate guest accessed pages table (GAPT) for each virtual machine. The RMT has a plurality of entries, each entry including information for identifying a virtual machine that is permitted to access an associated page of data in a memory. Each GAPT has a record of pages being accessed by a corresponding virtual machine. During operation, a table walker receives a request from a given virtual machine to translate a guest physical address to a system physical address. The table walker checks at least one of the RMT and a corresponding GAPT to determine whether the given virtual machine has access to a corresponding page. If not, the table walker terminates the translating. Otherwise, the table walker completes the translating.

    VARIABLE-SIZED BUFFERS MAPPED TO HARDWARE REGISTERS
    5.
    发明申请
    VARIABLE-SIZED BUFFERS MAPPED TO HARDWARE REGISTERS 有权
    映射到硬件寄存器的可变尺寸缓冲区

    公开(公告)号：US20140344489A1

    公开(公告)日：2014-11-20

    申请号：US13898326

    申请日：2013-05-20

    Applicant: Advanced Micro Devices, Inc.

    Inventor： Patryk Kaminski ,  Thomas R. Woller

    IPC: G06F5/08

    CPC classification number: G06F5/08 ,  G06F9/3881

    Abstract: An interface includes a first hardware register field to store respective chunks of a command directed to a device and respective chunks of a response to the command from the device. The interface also includes a second hardware register field to store a size of the command and a size of the response. The first and second hardware register fields are accessible by the device and by a processor external to the device that generates the command, in response to memory not being available to buffer the command and the response.

    Abstract translation: 接口包括第一硬件寄存器字段，用于存储针对设备的命令的各个块以及对来自该设备的命令的响应的相应组块。 接口还包括第二硬件寄存器字段，用于存储命令的大小和响应的大小。 第一和第二硬件寄存器字段可由设备和生成命令的设备外部的处理器访问，以响应不能用于缓冲命令和响应的存储器。

    Method and apparatus for providing asymmetric cryptographic keys
    6.
    发明授权
    Method and apparatus for providing asymmetric cryptographic keys 有权

    公开(公告)号：US10523428B2

    公开(公告)日：2019-12-31

    申请号：US15820539

    申请日：2017-11-22

    Applicant: Advanced Micro Devices, Inc.

    Inventor： Gongyuan Zhuang ,  Thomas R. Woller

    IPC: H04L9/08 ,  H04L9/14 ,  H04L9/30

    Abstract: A method and apparatus provides cryptographic keys using, for example, a cryptographic co-processor (CCP) that uses spare processor cycles to work on cryptographic key generation in advance of the keys being needed by a requestor such as an application, or other process in the device. In one example, the cryptographic co-processor detects an idle condition of the CCP such as an idle condition of a cryptographic engine in the CCP. Control logic causes the CCP to generate at least one asymmetric key component corresponding to an asymmetric cryptographic key in response to detecting the idle condition. The method and apparatus stores the asymmetric key component(s) in persistent memory and generates the asymmetric cryptographic key using the stored asymmetric key component that was generated in response to detection of the idle condition of the CCP.

    METHOD AND APPARATUS FOR PROVIDING ASYMMETRIC CRYPTOGRAPHIC KEYS
    7.
    发明申请
    METHOD AND APPARATUS FOR PROVIDING ASYMMETRIC CRYPTOGRAPHIC KEYS 审中-公开

    公开(公告)号：US20190158278A1

    公开(公告)日：2019-05-23

    申请号：US15820539

    申请日：2017-11-22

    Applicant: Advanced Micro Devices, Inc.

    Inventor： Gongyuan Zhuang ,  Thomas R. Woller

    IPC: H04L9/08 ,  H04L9/14

    CPC classification number: H04L9/0822 ,  H04L9/0861 ,  H04L9/0877 ,  H04L9/0894 ,  H04L9/0897 ,  H04L9/14 ,  H04L9/302 ,  H04L9/3033

    Abstract: A method and apparatus provides cryptographic keys using, for example, a cryptographic co-processor (CCP) that uses spare processor cycles to work on cryptographic key generation in advance of the keys being needed by a requestor such as an application, or other process in the device. In one example, the cryptographic co-processor detects an idle condition of the CCP such as an idle condition of a cryptographic engine in the CCP. Control logic causes the CCP to generate at least one asymmetric key component corresponding to an asymmetric cryptographic key in response to detecting the idle condition. The method and apparatus stores the asymmetric key component(s) in persistent memory and generates the asymmetric cryptographic key using the stored asymmetric key component that was generated in response to detection of the idle condition of the CCP.

    Variable-sized buffers mapped to hardware registers
    9.
    发明授权
    Variable-sized buffers mapped to hardware registers 有权
    可变大小的缓冲区映射到硬件寄存器

    公开(公告)号：US09223542B2

    公开(公告)日：2015-12-29

    申请号：US13898326

    申请日：2013-05-20

    Applicant: Advanced Micro Devices, Inc.

    Inventor： Patryk Kaminski ,  Thomas R. Woller

    IPC: G06F3/00 ,  G06F5/08 ,  G06F13/00

    CPC classification number: G06F5/08 ,  G06F9/3881

    Abstract: An interface includes a first hardware register field to store respective chunks of a command directed to a device and respective chunks of a response to the command from the device. The interface also includes a second hardware register field to store a size of the command and a size of the response. The first and second hardware register fields are accessible by the device and by a processor external to the device that generates the command, in response to memory not being available to buffer the command and the response.

    Abstract translation: 接口包括第一硬件寄存器字段，用于存储针对设备的命令的各个块以及对来自该设备的命令的响应的相应组块。 接口还包括第二硬件寄存器字段，用于存储命令的大小和响应的大小。 第一和第二硬件寄存器字段可由设备和生成命令的设备外部的处理器访问，以响应不能用于缓冲命令和响应的存储器。

    Controlling access to pages in a memory in a computing device
    10.
    发明授权
    Controlling access to pages in a memory in a computing device 有权

    公开(公告)号：US10169244B2

    公开(公告)日：2019-01-01

    申请号：US15224302

    申请日：2016-07-29

    Applicant: Advanced Micro Devices, Inc.

    Inventor： David A. Kaplan ,  Jeremy W. Powell ,  Thomas R. Woller

    IPC: G06F12/10 ,  G06F12/1027 ,  G06F12/1009 ,  G06F9/455

    Abstract: The described embodiments perform a method for handling memory accesses by virtual machines in a computing device. The described embodiments include a reverse map table (RMT) and a separate guest accessed pages table (GAPT) for each virtual machine. The RMT has a plurality of entries, each entry including information for identifying a virtual machine that is permitted to access an associated page of data in a memory. Each GAPT has a record of pages being accessed by a corresponding virtual machine. During operation, a table walker receives a request from a given virtual machine to translate a guest physical address to a system physical address. The table walker checks at least one of the RMT and a corresponding GAPT to determine whether the given virtual machine has access to a corresponding page. If not, the table walker terminates the translating. Otherwise, the table walker completes the translating.

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