公开(公告)号：US20250004974A1

公开(公告)日：2025-01-02

申请号：US18345992

申请日：2023-06-30

Applicant: ADVANCED MICRO DEVICES, INC. ,  ATI TECHNOLOGIES ULC

Inventor： BUHENG XU ,  XIAO HAN ,  PHILIP NG ,  SHIWU YANG

IPC: G06F13/42

Abstract: An apparatus translates transaction requests using a bus protocol translation lookup table (LUT) that comprises bus protocol translation data. A bus protocol translation controller generates the outgoing translated transaction request by translating the incoming transaction request using the bus protocol translation data from the bus protocol translation LUT. The controller translates a received response from the target unit to a response in a first bus protocol for a corresponding requesting unit. Associated methods are also presented. In some examples, the bus protocol translation data corresponds to each of a plurality of requesting units for translating between an incoming transaction request sent via a first bus protocol to an outgoing translated transaction request sent via a second bus protocol for the at least one target unit.

公开(公告)号：US20240264969A1

公开(公告)日：2024-08-08

申请号：US18163620

申请日：2023-02-02

Applicant: ADVANCED MICRO DEVICES, INC. ,  ATI TECHNOLOGIES ULC.

Inventor： BUHENG XU ,  Dong YU ,  Philip NG ,  Lianji CHENG

IPC: G06F13/42

CPC classification number: G06F13/4221 ,  G06F2213/0026

Abstract: An apparatus includes logic circuitry that selects a retag transaction identifier for an original transaction identifier of an incoming transaction request, based on a plurality of sub-groups of retag tracking data. Each sub-group of retag tracking data is associated with a corresponding sub-group of retag transaction identifiers in a group of retag transaction identifiers. The logic circuitry retags the incoming transaction request with the selected retag transaction identifier (ID) by replacing the original transaction identifier associated with the incoming transaction request and sends the retagged incoming transaction request to a target. A returned response is received from the target. The retag transaction ID in the returned response is removed and replaced with the original transaction ID before being sent as a reply to the requesting unit. Associated methods are also presented.

公开(公告)号：US20250110908A1

公开(公告)日：2025-04-03

申请号：US18478288

申请日：2023-09-29

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： QING LI ,  BUHENG XU

IPC: G06F13/40 ,  G06F12/06 ,  G06F13/42

Abstract: An apparatus includes a controller that generates a configuration base address register (BAR) allocation lookup table in a first memory, such as SRAM. The configuration BAR allocation lookup table includes at least one BAR configuration entry associated with each of a plurality of peripheral devices wherein each BAR configuration entry includes configuration data for configuring at least one corresponding physical BAR associated with a corresponding peripheral device. The controller configures one or more physical BARs based on the configuration data in the configuration BAR allocation lookup table. Associated methods are also presented.