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公开(公告)号:US20160195890A1
公开(公告)日:2016-07-07
申请号:US14976946
申请日:2015-12-21
Applicant: ALPS ELECTRIC CO., LTD.
Inventor: Akira Asao , Kiyoshi Sasai
CPC classification number: G05F3/267
Abstract: A first transistor and a second transistor form a current mirror circuit. A second current flowing in the second transistor is kept constant by a current control circuit. Therefore, a first current, to be output to a load, in the first transistor is kept at a constant value responsive to the second current in the second transistor. Since a drain voltage in the second transistor is controlled so as to become equal to a drain voltage in the first transistor, even if a voltage at an output terminal changes in response to a change in the impedance of the load, a ratio between the first current and the second current becomes substantially equal to a size ratio K between the first transistor and the second transistor. That is, the first current and second current precisely operate as a current mirror circuit.
Abstract translation: 第一晶体管和第二晶体管形成电流镜电路。 流过第二晶体管的第二电流由电流控制电路保持恒定。 因此,响应于第二晶体管中的第二电流,要输出到第一晶体管中的负载的第一电流被保持在恒定值。 由于第二晶体管中的漏极电压被控制成等于第一晶体管中的漏极电压,所以即使输出端子上的电压响应于负载的阻抗的变化而改变,第一 电流和第二电流变得基本上等于第一晶体管和第二晶体管之间的尺寸比K。 也就是说,第一电流和第二电流精确地作为电流镜电路工作。
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公开(公告)号:US09685914B2
公开(公告)日:2017-06-20
申请号:US15065066
申请日:2016-03-09
Applicant: ALPS ELECTRIC CO., LTD.
Inventor: Kiyoshi Sasai , Akira Asao
CPC classification number: H03F1/26 , H03F3/393 , H03F3/45197 , H03F3/4565 , H03F3/45668 , H03F2200/171 , H03F2200/261 , H03F2200/381 , H03F2200/411 , H03F2200/555 , H03F2203/45116 , H03F2203/45188 , H03F2203/45358 , H03F2203/45652 , H03F2203/45674 , H03F2203/45682
Abstract: A differential signal is input to a pair of gates of a differential pair, a differential signal generated by a load circuit connected to drains of the differential pair is amplified by a differential amplifier stage, and the amplified differential signal is fed back to a pair of sources of the differential pair via a feedback circuit. It is possible to maintain a high input impedance in the pair of gates of the differential pair while not being influenced by a gain of negative feedback of an amplifier circuit, and it is possible to perform amplification in an input stage by using a pair of a first transistor and a second transistor of the differential pair. Therefore, compared with the related art, it is possible to decrease the number of transistors in the input stage and to reduce a flicker noise.
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公开(公告)号:US09461635B2
公开(公告)日:2016-10-04
申请号:US14573234
申请日:2014-12-17
Applicant: ALPS ELECTRIC CO., LTD.
Inventor: Kiyoshi Sasai
IPC: G06G7/18 , H03K5/1252 , H03H11/12 , G06G7/186 , G06G7/184
CPC classification number: H03K5/1252 , G06G7/184 , G06G7/186 , H03H11/126
Abstract: In an integration mode, since a switch becomes OFF, a positive feedback path from an output terminal of an operational amplifier to a positive input terminal is blocked. Therefore, oscillation can be prevented even when a voltage of a signal line connected to a reference voltage supply point varies due to an impedance of the reference voltage supply point not being 0. In the integration mode, a resistor and a capacitor function as a noise filter. Further, in a reset mode, a switch becomes ON, and charge is accumulated in the capacitor depending on a reference voltage of the reference voltage supply point.
Abstract translation: 在积分模式中,由于开关变为OFF,所以从运算放大器的输出端到正输入端的正反馈路径被阻断。 因此,即使在与基准电压供给点连接的信号线的电压由于基准电压供给点的阻抗不为0而变化的情况下也能够防止振荡。在积分模式中,电阻和电容器作为噪声起作用 过滤。 此外,在复位模式下,开关变为ON,并且根据参考电压提供点的参考电压而在电容器中累积电荷。
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公开(公告)号:US20160190998A1
公开(公告)日:2016-06-30
申请号:US15065066
申请日:2016-03-09
Applicant: ALPS ELECTRIC CO., LTD.
Inventor: Kiyoshi Sasai , Akira Asao
CPC classification number: H03F1/26 , H03F3/393 , H03F3/45197 , H03F3/4565 , H03F3/45668 , H03F2200/171 , H03F2200/261 , H03F2200/381 , H03F2200/411 , H03F2200/555 , H03F2203/45116 , H03F2203/45188 , H03F2203/45358 , H03F2203/45652 , H03F2203/45674 , H03F2203/45682
Abstract: A differential signal is input to a pair of gates of a differential pair, a differential signal generated by a load circuit connected to drains of the differential pair is amplified by a differential amplifier stage, and the amplified differential signal is fed back to a pair of sources of the differential pair via a feedback circuit. It is possible to maintain a high input impedance in the pair of gates of the differential pair while not being influenced by a gain of negative feedback of an amplifier circuit, and it is possible to perform amplification in an input stage by using a pair of a first transistor and a second transistor of the differential pair. Therefore, compared with the related art, it is possible to decrease the number of transistors in the input stage and to reduce a flicker noise.
Abstract translation: 差分信号被输入到差分对的一对门,由连接到差分对的漏极的负载电路产生的差分信号由差分放大级放大,放大的差分信号被反馈到一对 通过反馈电路的差分对的源极。 可以在不受放大器电路的负反馈的增益的影响的同时在差分对的一对栅极中保持高的输入阻抗,并且可以通过使用一对 第一晶体管和第二晶体管。 因此,与现有技术相比,可以减少输入级中的晶体管数量并减少闪烁噪声。
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