利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

27 条记录 (耗时 0.016 秒)

    Amplifier device
    1.
    发明授权
    Amplifier device 有权
    放大器装置

    公开(公告)号：US07760020B2

    公开(公告)日：2010-07-20

    申请号：US12121965

    申请日：2008-05-16

    申请人： Stefan Hermann Groiss

    发明人： Stefan Hermann Groiss

    IPC分类号： H03F3/45

    CPC分类号： H03F3/08 ,  H03F3/087 ,  H03F3/211 ,  H03F3/4508 ,  H03F3/45282 ,  H03F3/45475 ,  H03F2203/21127 ,  H03F2203/21142 ,  H03F2203/45021 ,  H03F2203/45022 ,  H03F2203/45031 ,  H03F2203/45032 ,  H03F2203/45136 ,  H03F2203/45326 ,  H03F2203/45358 ,  H03F2203/45374 ,  H03F2203/45511 ,  H03F2203/45521 ,  H03F2203/45528 ,  H03F2203/45646 ,  H03F2203/45674 ,  H03G3/3084

    摘要： An electronic circuit arrangement is provided which comprises an input terminal configured to input an input signal to be amplified and an output terminal configured to output the amplified input signal as an output signal. A signal path is defined between the input terminal and the output terminal. An amplifier unit having an amplifier gain is provided and being configured to amplify the input signal and for generating the output signal. A variation of an operational current of the amplifier unit is configured to provide a variation of the amplifier gain. The amplifier unit is arranged within the signal path. Furthermore a gain control unit is configured to control the gain of the amplifier unit by adjusting the operational current of the amplifier unit. The gain control unit is arranged outside the signal path.

    摘要翻译： 提供了一种电子电路装置，其包括被配置为输入要放大的输入信号的输入端子和被配置为输出放大的输入信号作为输出信号的输出端子。 在输入端子和输出端子之间定义信号路径。 提供具有放大器增益的放大器单元，其被配置为放大输入信号并产生输出信号。 放大器单元的工作电流的变化被配置为提供放大器增益的变化。 放大器单元布置在信号路径内。 此外，增益控制单元被配置为通过调整放大器单元的工作电流来控制放大器单元的增益。 增益控制单元布置在信号路径的外部。

    AMPLIFICATION CIRCUIT IMPROVED WITH LINEARITY AND FREQUENCY CONVERTER USING THE SAME
    2.
    发明申请
    AMPLIFICATION CIRCUIT IMPROVED WITH LINEARITY AND FREQUENCY CONVERTER USING THE SAME 失效
    使用线性和频率转换器改进的放大电路

    公开(公告)号：US20070057726A1

    公开(公告)日：2007-03-15

    申请号：US11467308

    申请日：2006-08-25

    申请人： TAE KIM

    发明人： TAE KIM

    IPC分类号： H03F3/45

    CPC分类号： H03F1/3205 ,  H03F1/0205 ,  H03F2200/357 ,  H03F2200/537 ,  H03F2203/45358

    摘要： Provided is a frequency converter using an amplification circuit that is improved with linearity by coupling a main transistor and an auxiliary transistor in parallel. An amplification circuit that is improved with linearity comprises an input block amplifying an input signal, an induction block inducing a current proportionate to an output signal of the input block and an amplification block comprising. The amplification block comprises a main transistor amplifying the output signal of the induction block, wherein the main transistor is biased to operate at a saturation region and an auxiliary transistor amplifying the output signal of the induction block, wherein the auxiliary transistor is biased to operate at a subthreshold region and coupled to the main transistor in parallel.

    摘要翻译： 提供了一种使用通过并联耦合主晶体管和辅助晶体管而线性提高的放大电路的变频器。 以线性方式改进的放大电路包括放大输入信号的输入块，感应与输入块的输出信号成比例的电流的感应块和包括的放大块。 放大块包括放大感应块的输出信号的主晶体管，其中主晶体管被偏置以在饱和区域工作，而辅助晶体管放大感应块的输出信号，其中辅助晶体管被偏置以在 亚阈值区域并且并联耦合到主晶体管。

    LEVEL SHIFTER
    3.
    发明申请
    LEVEL SHIFTER 审中-公开
    水平变化

    公开(公告)号：US20110210781A1

    公开(公告)日：2011-09-01

    申请号：US13063285

    申请日：2009-09-09

    申请人： Willem Groeneweg

    发明人： Willem Groeneweg

    IPC分类号： H03L5/00

    CPC分类号： H03K3/356113 ,  H03F3/45179 ,  H03F2203/45358 ,  H03K5/08 ,  H03K17/223

    摘要： A level shifter (21) comprises a first stage (22) and a second stage (23). The first stage (22) comprises first and second inputs (34, 35) and is configured to generate a first signal (37) which indicates in a first state if either at least one of at least two first power voltages (Vdig, Vdda) provided for circuitries (38, 39) is unavailable or in a second state if each of the first power voltages (Vdig, Vdda) is available at the first and second inputs (34, 35). The second stage (23) comprises an output (51-54) and is configured to switch a second power voltage (Vbat) through to be present at the output (51-54) only if the first signal (37) is in its second state.

    摘要翻译： 电平移位器（21）包括第一级（22）和第二级（23）。 第一级（22）包括第一和第二输入端（34,35），并且被配置为产生第一信号（37），其在第一状态下指示是否至少两个第一电源电压（Vdig，Vdda） 如果所述第一电源电压（Vdig，Vdda）中的每一个在所述第一和第二输入端（34,35）都可用，则提供电路（38,39）不可用或处于第二状态。 第二级（23）包括输出（51-54），并且被配置为仅在第一信号（37）处于其第二状态时才将第二电源电压（Vbat）切换为存在于输出（51-54） 州。

    Constant transconductance operational amplifier and method for operation
    4.
    发明授权
    Constant transconductance operational amplifier and method for operation 有权
    恒定跨导运算放大器及其操作方法

    公开(公告)号：US08004361B2

    公开(公告)日：2011-08-23

    申请号：US12684704

    申请日：2010-01-08

    申请人： Ching-Tzung Lin

    发明人： Ching-Tzung Lin

    IPC分类号： H03F3/45

    CPC分类号： H03F3/45183 ,  H03F2203/45358

    摘要： An embodiment is a circuit comprising a first transistor, a second transistor, a third transistor, a fourth transistor, a first switch, and a second switch. The first transistor, the second transistor, the third transistor, and the fourth transistor are all of a same conductivity type. Sources of the first transistor, the second transistor, the third transistor, and the fourth transistor are electrically coupled together. Drains of the first transistor and the third transistor are electrically coupled together, and drains of the second transistor and the fourth transistor are electrically coupled together. A feature of the third transistor is three times a feature of the first transistor such that 3 ⁡ [ μ ⁢ ⁢ C ox ⁡ ( W L ) ] T ⁢ ⁢ 1 = [ μ ⁢ ⁢ C ox ⁡ ( W L ) ] T ⁢ ⁢ 3 is satisfied where “T1” denotes the first transistor and “T3” denotes the third transistor, and a feature of the fourth transistor is three times a feature of the second transistor such that 3 ⁡ [ μ ⁢ ⁢ C ox ⁡ ( W L ) ] T ⁢ ⁢ 2 = [ μ ⁢ ⁢ C ox ⁡ ( W L ) ] T ⁢ ⁢ 4 is satisfied where “T2” denotes the second transistor and “T4” denotes the fourth transistor. The first switch is operable to selectively electrically couple a first input terminal to a gate of the third transistor, and the second switch is operable to selectively electrically couple a second input terminal to a gate of the fourth transistor.

    摘要翻译： 实施例是包括第一晶体管，第二晶体管，第三晶体管，第四晶体管，第一开关和第二开关的电路。 第一晶体管，第二晶体管，第三晶体管和第四晶体管都具有相同的导电类型。 第一晶体管，第二晶体管，第三晶体管和第四晶体管的源极电耦合在一起。 第一晶体管和第三晶体管的漏极电耦合在一起，并且第二晶体管和第四晶体管的漏极电耦合在一起。 第三晶体管的特征是第一晶体管的特征的三倍，使得3⁡[μTPSCox⁡（WL）] T ud 1 = [μ令C ox⁡（WL）] Tü3 满足“T1”表示第一晶体管，“T3”表示第三晶体管，并且第四晶体管的特征是第三晶体管的特征的三倍，使得3⁡[μTPSCox⁡（WL）] 在“T2”表示第二晶体管且“T4”表示第四晶体管的情况下，T ud 2 = [μTPSC ox⁡（WL）] T ud 4。 第一开关可操作以选择性地将第一输入端子电耦合到第三晶体管的栅极，并且第二开关可操作以选择性地将第二输入端子电耦合到第四晶体管的栅极。

    Multi-input transistor circuit and multi-input transconductance circuit
    5.
    发明授权
    Multi-input transistor circuit and multi-input transconductance circuit 失效
    多输入晶体管电路和多输入跨导电路

    公开(公告)号：US5977818A

    公开(公告)日：1999-11-02

    申请号：US418447

    申请日：1995-04-07

    申请人： Zdzislaw Czarnul ,  Kazuhiro Tsuji

    发明人： Zdzislaw Czarnul ,  Kazuhiro Tsuji

    IPC分类号： H01L29/78 ,  G05F3/24 ,  H03F1/32 ,  H03F1/56 ,  H03F3/345 ,  H03F3/45 ,  G05F3/02

    CPC分类号： H03F3/45188 ,  G05F3/247 ,  H03F2203/45356 ,  H03F2203/45358

    摘要： A multi-input transistor circuit including a plurality of input MOS transistors having gates each serving as an analog voltage input terminal, operating in a non-saturation area and connected in parallel; and circuit for providing a constant drain/source voltage for each of the input MOS transistors, and having a current output point. A multi-input transconductance circuit including first and second MOS transistor groups having gates serving as first and second analog voltage input terminals, respectively, operating in a non-saturation area and connected in parallel; and a circuit for providing constant drain/source voltage for the transistors in each group and connected to a common source connecting point of each of the first and second MOS transistor groups, and having first and second current output terminals. The multi-input transistor and the multi-input transconductance circuit exhibit input-to-output linearity, have a wide dynamic range and are equivalent to an n-gate transistor.

    摘要翻译： 一种多输入晶体管电路，包括多个具有各自用作模拟电压输入端的栅极的输入MOS晶体管，在非饱和区域中并联并联; 以及用于为每个输入MOS晶体管提供恒定的漏极/源极电压并具有电流输出点的电路。 一种多输入跨导电路，包括分别具有用作第一和第二模拟电压输入端的栅极的第一和第二MOS晶体管组，工作在非饱和区并并联连接; 以及用于为每个组中的晶体管提供恒定的漏极/源极电压并且连接到第一和第二MOS晶体管组中的每一个的公共源极连接点并且具有第一和第二电流输出端子的电路。 多输入晶体管和多输入跨导电路具有输入到输出的线性度，具有宽动态范围并且等效于n栅极晶体管。

    LIGHT RECEIVING CIRCUIT AND PHOTOCOUPLER
    6.
    发明申请
    LIGHT RECEIVING CIRCUIT AND PHOTOCOUPLER 有权
    光接收电路和光电二极管

    公开(公告)号：US20140284458A1

    公开(公告)日：2014-09-25

    申请号：US14023387

    申请日：2013-09-10

    申请人： KABUSHIKI KAISHA TOSHIBA

    发明人： Hisami Saito ,  Masayuki Sugizaki ,  Shigeyuki Sakura

    IPC分类号： H01L31/02

    CPC分类号： H01L31/02019 ,  H03F3/085 ,  H03F3/211 ,  H03F3/45282 ,  H03F2203/45358 ,  H03F2203/45674

    摘要： A light receiving circuit includes a light receiving element, a transimpedance amplifier, a delay circuit and a comparator. The transimpedance amplifier is configured to convert the current signal into a first voltage. The comparator includes first to third current control elements each including first to third electrodes and configured to control current of the third electrode by voltage of the second electrode. The first voltage is inputted to the second electrode of the first current control element. Output voltage of the delay circuit is inputted to the second electrode of the second current control element. A second voltage is inputted to the second electrode of the third current control element. The comparator is configured to compare output current of the first current control element with sum of output current of the second current control element and output current of the third current control element.

    摘要翻译： 光接收电路包括光接收元件，跨阻放大器，延迟电路和比较器。 跨阻放大器被配置为将电流信号转换成第一电压。 比较器包括第一至第三电流控制元件，每个电流控制元件包括第一至第三电极，并且被配置为通过第二电极的电压来控制第三电极的电流。 第一电压被输入到第一电流控制元件的第二电极。 延迟电路的输出电压被输入到第二电流控制元件的第二电极。 第二电压被输入到第三电流控制元件的第二电极。 比较器被配置为将第一电流控制元件的输出电流与第二电流控制元件的输出电流和第三电流控制元件的输出电流进行比较。

    DIFFERENTIAL DRIVER CIRCUIT
    9.
    发明申请
    DIFFERENTIAL DRIVER CIRCUIT 失效
    差分驱动电路

    公开(公告)号：US20110234317A1

    公开(公告)日：2011-09-29

    申请号：US13002975

    申请日：2009-10-14

    申请人： Yasuyuki Arai ,  Shoji Kojima

    发明人： Yasuyuki Arai ,  Shoji Kojima

    IPC分类号： H03F3/45

    CPC分类号： H03G1/0088 ,  G01R31/31706 ,  H03F3/45183 ,  H03F3/72 ,  H03F2203/45358

    摘要： A first current source supplies a tail current It to a plurality of differential pairs. A pre-driver outputs gate signals to the gates of transistors of the corresponding differential pair. A pre-driver is configured to switch the state between the enable state and the disable state. In the enable state, the pre-driver outputs the gate signals that correspond to the differential signals. In the disable state, the pre-driver outputs the gate signals having levels which instruct the transistors of the corresponding differential pair to switch off.

    摘要翻译： 第一电流源将尾电流It提供给多个差分对。 预驱动器将门信号输出到相应差分对的晶体管的栅极。 预驱动器被配置为在使能状态和禁止状态之间切换状态。 在使能状态下，预驱动器输出与差分信号对应的门信号。 在禁止状态下，预驱动器输出具有指示相应差分对的晶体管关断的电平的门信号。

    CONSTANT TRANSCONDUCTANCE OPERATIONAL AMPLIFIER AND METHOD FOR OPERATION
    10.
    发明申请
    CONSTANT TRANSCONDUCTANCE OPERATIONAL AMPLIFIER AND METHOD FOR OPERATION 有权
    恒定的运算放大器和操作方法

    公开(公告)号：US20110169567A1

    公开(公告)日：2011-07-14

    申请号：US12684704

    申请日：2010-01-08

    申请人： Ching-Tzung Lin

    发明人： Ching-Tzung Lin

    IPC分类号： H03F3/45

    CPC分类号： H03F3/45183 ,  H03F2203/45358

    摘要： An embodiment is a circuit comprising a first transistor, a second transistor, a third transistor, a fourth transistor, a first switch, and a second switch. The first transistor, the second transistor, the third transistor, and the fourth transistor are all of a same conductivity type. Sources of the first transistor, the second transistor, the third transistor, and the fourth transistor are electrically coupled together. Drains of the first transistor and the third transistor are electrically coupled together, and drains of the second transistor and the fourth transistor are electrically coupled together. A feature of the third transistor is three times a feature of the first transistor such that 3  [ μ   C ox  ( W L ) ] T   1 = [ μ   C ox  ( W L ) ] T   3 is satisfied where “T1” denotes the first transistor and “T3” denotes the third transistor, and a feature of the fourth transistor is three times a feature of the second transistor such that 3  [ μ   C ox  ( W L ) ] T   2 = [ μ   C ox  ( W L ) ] T   4 is satisfied where “T2” denotes the second transistor and “T4” denotes the fourth transistor. The first switch is operable to selectively electrically couple a first input terminal to a gate of the third transistor, and the second switch is operable to selectively electrically couple a second input terminal to a gate of the fourth transistor.

    摘要翻译： 实施例是包括第一晶体管，第二晶体管，第三晶体管，第四晶体管，第一开关和第二开关的电路。 第一晶体管，第二晶体管，第三晶体管和第四晶体管都具有相同的导电类型。 第一晶体管，第二晶体管，第三晶体管和第四晶体管的源极电耦合在一起。 第一晶体管和第三晶体管的漏极电耦合在一起，并且第二晶体管和第四晶体管的漏极电耦合在一起。 第三晶体管的特征是第一晶体管的特征的三倍，使得3 [μsum C ox 满足“T1”表示第一晶体管，“T3”表示第三晶体管，并且第四晶体管的特征是第三晶体管的特征的三倍，使得3 [μs]（ox） 在“T2”表示第二晶体管，“T4”表示第四晶体管的情况下，满足T满足2 = [μamp C ox（（WL） 第一开关可操作以选择性地将第一输入端子电耦合到第三晶体管的栅极，并且第二开关可操作以选择性地将第二输入端子电耦合到第四晶体管的栅极。