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公开(公告)号：US10305369B2
公开(公告)日：2019-05-28
申请号：US15443950
申请日：2017-02-27
Applicant: Analog Devices Global
Inventor： Bin Shao , Sean Kowalik , Alan S. Walsh , Danzhu Lu
IPC: H02M1/12 , G01S7/48 , H02M3/158 , H02M1/14 , H02M3/335 , G01S7/484 , G01S7/486 , H01S5/042 , H02M1/08 , H03M1/80
Abstract: This application discusses techniques for reducing the energy of an output ripple in a voltage converter at a switching frequency of the voltage converter. In certain examples, an amplitude of a reference voltage can be modulated with a time-varying random value or pseudo-random value to provide a reduction in the energy of the output ripple at the switching frequency of the voltage converter.
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公开(公告)号：US09800170B2
公开(公告)日：2017-10-24
申请号：US14939267
申请日：2015-11-12
Applicant: Analog Devices Global
Inventor： Bin Shao
CPC classification number: H02M7/066 , G01R19/00 , H02J7/00 , H02J7/0052 , H02J2007/0059
Abstract: Apparatus and techniques described herein can include using an electronic circuit comprising a rectifier circuit, an open-circuit voltage (OCV) sampling circuit coupled to the output of the rectifier circuit, and a regulator circuit coupled to the output of the rectifier circuit. In an example, an isolation switch can be located between the regulator circuit and the rectifier circuit, the isolation switch configured to isolate the regulator circuit from the rectifier circuit for sampling of the open-circuit voltage by the open-circuit voltage sampling circuit. In another example, a buffer circuit can be used, such as placed in-line with a divider circuit between a divider circuit and an open-circuit voltage sampling capacitor. In this manner, the buffer circuit can provide a low output impedance, isolating the voltage sampling capacitor from the divider circuit.
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公开(公告)号：US09391519B2
公开(公告)日：2016-07-12
申请号：US14311907
申请日：2014-06-23
Applicant: Analog Devices Global
Inventor： Danzhu Lu , Xiaohan Gong , Bin Shao
IPC: H03K3/356 , H02M3/158 , H03K19/017
CPC classification number: H02M3/158 , H03K3/356 , H03K19/01721
Abstract: A device to detect an electrical signal is provided. The device includes sensing, output, and pull-down nodes. The device includes a pull-down circuit having a native metal-oxide-semiconductor field-effect transistor (MOSFET) to pull down the output node to approximately a voltage of the pull-down node. The device includes a switch circuit having a junction field-effect transistor (JFET). The JFET turns on the pull-down circuit in response to a voltage of the sensing node being less than a first threshold. The JFET also turns off the pull-down circuit in response to the voltage of the sensing node being greater than the first threshold.
Abstract translation: 提供了一种用于检测电信号的装置。 该设备包括感测，输出和下拉节点。 该器件包括具有天然金属氧化物半导体场效应晶体管（MOSFET）的下拉电路，以将输出节点下拉到大约下拉节点的电压。 该器件包括具有结型场效应晶体管（JFET）的开关电路。 JFET响应于感测节点的电压小于第一阈值而导通下拉电路。 JFET还响应于感测节点的电压大于第一阈值而关断下拉电路。
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公开(公告)号：US20150349637A1
公开(公告)日：2015-12-03
申请号：US14311907
申请日：2014-06-23
Applicant: Analog Devices Global
Inventor： Danzhu Lu , Xiaohan Gong , Bin Shao
IPC: H02M3/158
CPC classification number: H02M3/158 , H03K3/356 , H03K19/01721
Abstract: A device to detect an electrical signal is provided. The device includes sensing, output, and pull-down nodes. The device includes a pull-down circuit having a native metal-oxide-semiconductor field-effect transistor (MOSFET) to pull down the output node to approximately a voltage of the pull-down node. The device includes a switch circuit having a junction field-effect transistor (JFET). The JFET turns on the pull-down circuit in response to a voltage of the sensing node being less than a first threshold. The JFET also turns off the pull-down circuit in response to the voltage of the sensing node being greater than the first threshold.
Abstract translation: 提供了一种用于检测电信号的装置。 该设备包括感测，输出和下拉节点。 该器件包括具有天然金属氧化物半导体场效应晶体管（MOSFET）的下拉电路，以将输出节点下拉到大约下拉节点的电压。 该器件包括具有结型场效应晶体管（JFET）的开关电路。 JFET响应于感测节点的电压小于第一阈值而导通下拉电路。 JFET还响应于感测节点的电压大于第一阈值而关断下拉电路。
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公开(公告)号：US10599171B2
公开(公告)日：2020-03-24
申请号：US16050742
申请日：2018-07-31
Applicant: Analog Devices Global Unlimited Company
Inventor： Langyuan Wang , Danzhu Lu , Xiaohan Gong , Bin Shao
Abstract: An electronic circuit includes parallel linear regulator circuits that support a range of different load currents. The electronic circuit includes a first linear regulator circuit coupled to an output node, a second linear regulator circuit coupled in parallel with the first linear regulator circuit and the output node, and a control circuit. The control circuit is configured to monitor the output node and to suppress or inhibit the second linear regulator circuit from supplying the output node when a representation of load power consumption is below a specified threshold. The first linear regulator circuit is configured to continue to supply a portion of the load power when the representation of load power consumption is above the specified threshold, and the control circuit may disable the second linear regulator circuit when the representation of load power consumption is below the specified threshold.
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Patent Agency Ranking
公开(公告)号：US20200042026A1
公开(公告)日：2020-02-06
申请号：US16050742
申请日：2018-07-31
Applicant: Analog Devices Global Unlimited Company
Inventor： Langyuan Wang , Danzhu Lu , Xiaohan Gong , Bin Shao
Abstract: An electronic circuit includes parallel linear regulator circuits that support a range of different load currents. The electronic circuit includes a first linear regulator circuit coupled to an output node, a second linear regulator circuit coupled in parallel with the first linear regulator circuit and the output node, and a control circuit. The control circuit is configured to monitor the output node and to suppress or inhibit the second linear regulator circuit from supplying the output node when a representation of load power consumption is below a specified threshold. The first linear regulator circuit is configured to continue to supply a portion of the load power when the representation of load power consumption is above the specified threshold, and the control circuit may disable the second linear regulator circuit when the representation of load power consumption is below the specified threshold.
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公开(公告)号：US20170201091A1
公开(公告)日：2017-07-13
申请号：US15012108
申请日：2016-02-01
Applicant: Analog Devices Global
Inventor： Bin Shao , Yanfeng Lu , Scott D. Biederwolf
IPC: H02J1/00
CPC classification number: H02J7/345 , H02J2007/0001
Abstract: Apparatus and techniques described herein can include a load circuit comprising a direct current (DC) input terminal, and a source circuit comprising a direct current (DC) output terminal coupled to the DC input terminal of the load circuit. The source circuit can include a source control circuit configured to provide a current-limited DC output voltage and monitor the current-limited DC output voltage to detect an authentication signal provided at the DC output terminal by the load circuit, the load circuit configured to modulate the voltage at the DC output terminal using a pull-down circuit. The load circuit can be configured to compare the supply voltage at the DC input terminal to a reference voltage and, in response, energize other portions of the load circuit when the input current provided the DC input terminal is sufficient as indicated at least in part by the comparison.
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公开(公告)号：US09219414B2
公开(公告)日：2015-12-22
申请号：US14064490
申请日：2013-10-28
Applicant: Analog Devices Global
Inventor： Bin Shao
CPC classification number: H02M3/158 , H02M3/157 , H02M2001/0009
Abstract: A switching regulator or other apparatus or techniques can include load current monitoring to provide a digital representation of an estimated load current. Load current monitoring can be performed by a circuit including a counter circuit, a comparator circuit, and a digitally-controlled source coupled to the counter circuit and configured to adjust a bias condition of a sensing device in response to a count provided by the counter circuit in order to establish a proportional relationship between a current conducted by the sensing device and a corresponding current conducted by a power switching device. The counter circuit is configured to increment and decrement the count in response to information provided by the comparator output and the count is generally indicative of the estimated load current, such as an average load current.
Abstract translation: 开关调节器或其他装置或技术可以包括负载电流监视以提供估计负载电流的数字表示。 负载电流监视可以由包括计数器电路，比较器电路和耦合到计数器电路的数字控制源的电路执行，并且被配置为响应于由计数器电路提供的计数来调整感测装置的偏置条件 以便建立由感测装置传导的电流与由电力开关装置传导的对应电流之间的比例关系。 计数器电路被配置为响应于由比较器输出提供的信息而增加和减少计数，并且计数通常表示估计的负载电流，例如平均负载电流。
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公开(公告)号：US10224800B2
公开(公告)日：2019-03-05
申请号：US15618270
申请日：2017-06-09
Applicant: Analog Devices Global
Abstract: Techniques for indicating a load level of a DC-DC switching converter are provided. IN an example, a method for real-time load current detection for a switching converter using a discontinuous conduction mode (DCM) of operation can include generating a minimum DCM current threshold based on an reference current source and a duty cycle of the switching converter, receiving a representation of inductor charge current from power switch of the switching converter at a comparator, comparing the representation to the DCM current threshold, and controlling the power switch using a discontinuous conduction mode of the switching converter when a peak of the representation exceeds the minimum DCM current threshold.
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公开(公告)号：US20180358884A1
公开(公告)日：2018-12-13
申请号：US15618270
申请日：2017-06-09
Applicant: Analog Devices Global
CPC classification number: H02M1/08 , H02M3/156 , H02M2001/0009
Abstract: Techniques for indicating a load level of a DC-DC switching converter are provided. IN an example, a method for real-time load current detection for a switching converter using a discontinuous conduction mode (DCM) of operation can include generating a minimum DCM current threshold based on an reference current source and a duty cycle of the switching converter, receiving a representation of inductor charge current from power switch of the switching converter at a comparator, comparing the representation to the DCM current threshold, and controlling the power switch using a discontinuous conduction mode of the switching converter when a peak of the representation exceeds the minimum DCM current threshold.
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