CAPACITANCE MEASUREMENT CIRCUIT
    7.
    发明申请
    CAPACITANCE MEASUREMENT CIRCUIT 审中-公开
    电容测量电路

    公开(公告)号:US20140009176A1

    公开(公告)日:2014-01-09

    申请号:US13691285

    申请日:2012-11-30

    Applicant: APPLE INC.

    CPC classification number: G01R27/2605 G09G3/006 G09G3/3648 G09G2320/043

    Abstract: A resistor having a known resistance is coupled in series with a device under test (DUT) having an unknown capacitance. An ac signal source having a known fundamental frequency is coupled to drive the resistor to thereby produce a first ac signal. A phase controllable signal generator produces a second ac signal. The first and second ac signals are fed to a mixer. An output of the mixer is low pass filtered. A peak detector monitors the low pass filtered output while sweeping the phase controllable signal generator, until a peak is detected. The set phase corresponding to the detected peak is then used to obtain an estimate of the unknown DUT capacitance. Other embodiments are also described and claimed.

    Abstract translation: 具有已知电阻的电阻器与具有未知电容的被测器件(DUT)串联耦合。 具有已知基频的交流信号源被耦合以驱动电阻器从而产生第一交流信号。 相位可控信号发生器产生第二交流信号。 第一和第二交流信号被馈送到混频器。 混频器的输出被低通滤波。 峰值检测器在扫描相位可控信号发生器时监视低通滤波输出,直到检测到峰值。 然后使用与检测到的峰对应的设定相位来获得未知DUT电容的估计。 还描述和要求保护其他实施例。

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