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公开(公告)号：US20190392546A1
公开(公告)日：2019-12-26
申请号：US16442711
申请日：2019-06-17
Applicant: Arm Limited
Inventor： Lars Oskar Flordal , Jakob Axel Fries
Abstract: A data processing system includes a producer processor that produces a sequence of data outputs for use by consumer processors of the data processing system. The system also includes a memory for storing a sequence of data outputs produced by the data processor. The data processor encodes data outputs as encoded blocks of data, storing a particular encoded block of a first frame in a first location in the memory and an indication of the first location. The data processor stores a corresponding encoded block of a second data output in a second location and updates the indication to the second location.
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2.发明申请IMAGE PROCESSING APPARATUS AND A METHOD OF STORING ENCODED DATA BLOCKS GENERATED BY SUCH AN IMAGE PROCESSING APPARATUS 有权图像处理装置和存储由这种图像处理装置产生的编码数据块的方法公开(公告)号：US20150070372A1
公开(公告)日：2015-03-12
申请号：US14024923
申请日：2013-09-12
Applicant: ARM LIMITED
Inventor： Jakob Axel Fries , Lars Oskar Flordal
IPC: G06T1/60
CPC classification number: G06T1/60 , G06F11/1064 , G06F12/0246
Abstract: An image processing apparatus and method including an encoder circuitry for generating encoded data blocks from input data blocks of an image, and write circuitry for storing the encoded data blocks to memory for subsequent access by decoding circuitry. For each input data block, identifier generation circuitry generates an identifier value that is dependent on the input data block. A lookup storage stores predetermined information relating to at least one encoded data block and stored within the lookup storage in association with the identifier value for the corresponding input data block. For a current input data block, a check is performed to determine whether a match exists between the identifier value generated for the current input data block and an identifier value stored in the lookup storage. In a match, the predetermined information is used by the write circuitry when performing the required write operation.
Abstract translation: 一种图像处理装置和方法，包括用于从图像的输入数据块生成编码数据块的编码器电路，以及用于将编码数据块存储到存储器以用于随后由解码电路进行存取的写入电路。 对于每个输入数据块，标识符生成电路产生取决于输入数据块的标识符值。 查找存储器存储与至少一个已编码数据块有关的预定信息，并与相应输入数据块的标识符值相关联地存储在查找存储器中。 对于当前输入数据块，执行检查以确定在当前输入数据块生成的标识符值与存储在查找存储器中的标识符值之间是否存在匹配。 在匹配中，当执行所需的写入操作时，写入电路使用预定信息。
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公开(公告)号：US10726610B2
公开(公告)日：2020-07-28
申请号：US16116137
申请日：2018-08-29
Applicant: Arm Limited
Inventor： Frode Heggelund , Toni Viki Brkic , Christian Vik Grovdal , Lars Oskar Flordal
IPC: G06T15/40
Abstract: A graphics processing system maintains a fragment tracking record that stores metadata relating to one or more previously received primitives. The metadata can indicate that the one or more previously received primitives are suitably covered by a subsequently received primitive such that one or more fragment processing operations need not be performed in respect of those one or more previously received primitives. The metadata stored for the one or more previously received primitives can then later be queried by one or more later stages of the graphics processing system to determine whether one or more fragments for the one or more previously received primitives can be at least partially discarded or “killed”.
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公开(公告)号：US10395394B2
公开(公告)日：2019-08-27
申请号：US15610016
申请日：2017-05-31
Applicant: ARM Limited
Inventor： Lars Oskar Flordal , Jakob Axel Fries , Toni Viki Brkic
IPC: G06K9/46 , G06T9/40 , H04N19/11 , H04N19/176 , H04N19/182 , H04N19/186 , H04N19/96 , G06T15/00 , G09G5/39 , G06T9/00 , H04N19/15
Abstract: A method of encoding a block of an array of data elements comprises selectively writing out an encoded version of the block either that is encoded using a first encoding scheme, which provides encoded blocks of non-fixed data size, or that is encoded using a second encoding scheme, which provides encoded blocks of fixed data size. The selection of which version of the encoded block to write out is based on the size of the encoded block when encoded using the first encoding scheme. This provides the potential for the encoded block that is written out to be compressed in a more superior manner using the first encoding scheme where possible, while also providing an encoded block that has a predictable maximum compressed size.
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公开(公告)号：US10001941B2
公开(公告)日：2018-06-19
申请号：US15469503
申请日：2017-03-25
Applicant: ARM Limited
Inventor： Lars Oskar Flordal , Toni Viki Brkic , Jakob Axel Fries
CPC classification number: G06F3/064 , G06F3/0604 , G06F3/0673 , G06T1/20 , G06T1/60 , G06T11/40 , G06T2210/08 , G09G5/393 , G09G2360/12 , G09G2360/122
Abstract: A tile-based graphics processing pipeline includes rendering circuitry for rendering graphics fragments to generate rendered fragment data. Each graphics fragment has associated with it a set of sampling positions to be rendered. The pipeline also includes a tile buffer configured to store rendered fragment data for sampling positions prior to the rendered fragment data being written out to memory, write out circuitry configured to write a compressed representation of the rendered fragment data for a tile in the tile buffer to memory, and processing circuitry. The processing circuitry identities, based on the writing of rendered fragment data to the tile buffer, any blocks comprising sampling positions within a tile having the same data value associated with each sampling position in the block, and to, when such a block of sampling positions is identified, trigger the write out circuitry to write a compressed representation of the block to the memory.
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Patent Agency Ranking
公开(公告)号：US20200074721A1
公开(公告)日：2020-03-05
申请号：US16116137
申请日：2018-08-29
Applicant: Arm Limited
Inventor： Frode Heggelund , Toni Viki Brkic , Christian Vik Grovdal , Lars Oskar Flordal
IPC: G06T15/40
Abstract: A graphics processing system maintains a fragment tracking record that stores metadata relating to one or more previously received primitives. The metadata can indicate that the one or more previously received primitives are suitably covered by a subsequently received primitive such that one or more fragment processing operations need not be performed in respect of those one or more previously received primitives. The metadata stored for the one or more previously received primitives can then later be queried by one or more later stages of the graphics processing system to determine whether one or more fragments for the one or more previously received primitives can be at least partially discarded or “killed”.
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公开(公告)号：US20190188896A1
公开(公告)日：2019-06-20
申请号：US16218982
申请日：2018-12-13
Applicant: Arm Limited
Inventor： Frode Heggelund , Toni Viki Brkic , Christian Vik Grovdal , Lars Oskar Flordal
Abstract: A graphics processing system can divide a render output into plural larger patches, with each larger patch encompassing plural smaller patches. A rasteriser of the system tests a larger patch against a primitive to be processed to determine if the primitive covers the larger patch. When it is determined that the primitive only partially covers the larger patch, the larger patch is sub-divided into plural smaller patches and at least one of the smaller patches is re-tested against the primitive. Conversely, when it is determined that the primitive completely covers the larger patch, the larger patch is output from the rasteriser in respect of the primitive for processing by a subsequent stage, of the graphics processing system. The system can provide efficient, hierarchal, processing of primitives, whilst helping to prevent the output of the rasteriser from becoming blocked.
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公开(公告)号：US10013790B2
公开(公告)日：2018-07-03
申请号：US15042540
申请日：2016-02-12
Applicant: ARM Limited
Inventor： Sandeep Kakarlapudi , Andreas Due Engh-Halstvedt , Lars Oskar Flordal , Arne Bergene Fossaa
CPC classification number: G06T15/005 , G06T11/40
Abstract: In a graphics processing system, a driver for the graphics processing pipeline can include conditional graphics processing tasks in the graphics processing tasks that are to be executed by the graphics processing pipeline to generate a render output required by an application. Each such conditional task has associated with it a condition to be used by the graphics processing pipeline to determine whether to execute processing for the task or not and a region of the render output over which the processing for the task will be executed when the condition for the task is met. The graphics processing pipeline determines whether the condition associated with the task has been met, and only executes the processing for the task if the condition associated with the task has been met.
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公开(公告)号：US20170329395A1
公开(公告)日：2017-11-16
申请号：US15590300
申请日：2017-05-09
Applicant: ARM Limited
Inventor： Lars Oskar Flordal
CPC classification number: G06F3/011 , G06F3/14 , G06T1/60 , G06T11/001 , G06T15/005 , G06T15/04 , G09G5/363 , G09G5/393 , G09G2360/06 , G09G2360/08 , G09G2360/10 , H04N19/20 , H04N19/42
Abstract: In a data processing system that includes a graphics processor and a video processor, graphics textures for use by the graphics processor are stored as encoded frames of video data. The video processor then decodes the video frames to reproduce the graphics texture(s) that the video frames encode, and stores the decoded graphics texture or textures in memory for use by the graphics processor.The graphics processor then reads the decoded graphics textures for use when generating its render outputs, such as output frames for display.
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公开(公告)号：US20170287101A1
公开(公告)日：2017-10-05
申请号：US15469503
申请日：2017-03-25
Applicant: ARM Limited
Inventor： Lars Oskar Flordal , Toni Viki Brkic , Jakob Axel Fries
CPC classification number: G06F3/064 , G06F3/0604 , G06F3/0673 , G06T1/20 , G06T1/60 , G06T11/40 , G06T2210/08 , G09G5/393 , G09G2360/12 , G09G2360/122
Abstract: A tile-based graphics processing pipeline includes rendering circuitry for rendering graphics fragments to generate rendered fragment data. Each graphics fragment has associated with it a set of sampling positions to be rendered. The pipeline also includes a tile buffer configured to store rendered fragment data for sampling positions prior to the rendered fragment data being written out to memory, write out circuitry configured to write a compressed representation of the rendered fragment data for a tile in the tile buffer to memory, and processing circuitry. The processing circuitry identities, based on the writing of rendered fragment data to the tile buffer, any blocks comprising sampling positions within a tile having the same data value associated with each sampling position in the block, and to, when such a block of sampling positions is identified, trigger the write out circuitry to write a compressed representation of the block to the memory.
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