公开(公告)号：US20240203733A1

公开(公告)日：2024-06-20

申请号：US18535715

申请日：2023-12-11

Applicant: ASM IP Holding B.V.

Inventor： Omar Elleuch ,  Yanfu Lu ,  Caleb Miskin ,  Alexandros Demos

IPC: H01L21/02 ,  C23C16/52

CPC classification number: H01L21/0262 ,  C23C16/52 ,  H01L21/02532

Abstract: A material layer deposition method includes supporting one and only one substrate in a chamber arrangement, exposing the substrate to a first material layer precursor and a second material layer precursor, and forming a first material layer overlaying the substrate using the first material layer precursor and the second material layer precursor. The first material layer is exposed to the first material layer to the first material layer precursor and a second material layer formed onto the first material layer using the first material layer precursor. The second material layer precursor includes a germanium-containing material layer precursor and the first material layer precursor includes at least one of trisilane (Si3H8) and tetrasilane (Si4H10). Material layer stacks, semiconductor processing systems, and computer program products are also described.

公开(公告)号：US20230223255A1

公开(公告)日：2023-07-13

申请号：US18153272

申请日：2023-01-11

Applicant: ASM IP Holding, B.V.

Inventor： Steven Van Aerde ,  Wilco Verweij ,  Bert Jongbloed ,  Dieter Pierreux ,  Kelly Houben ,  Rami Khazaka ,  Frederick Aryeetey ,  Peter Westrom ,  Omar Elleuch ,  Caleb Miskin

IPC: H01L21/02 ,  C30B25/16 ,  C30B29/06 ,  C30B29/52 ,  C30B29/68

CPC classification number: H01L21/0257 ,  C30B25/165 ,  C30B29/06 ,  C30B29/52 ,  C30B29/68 ,  H01L21/0262 ,  H01L21/02532

Abstract: A method and a wafer processing furnace for forming an epitaxial stack on a plurality of substrates is provided. In a preferred embodiment, the method comprises providing the plurality of substrates to a process chamber. A plurality of deposition cycles is executed, thereby forming the epitaxial stack on the plurality of substrates. The epitaxial stack comprises a plurality of epitaxial pairs, wherein the epitaxial pairs each comprises a first epitaxial layer and a second epitaxial layer, the second epitaxial layer being different from the first epitaxial layer. Each deposition cycle comprises a first deposition pulse and a second deposition pulse. The first deposition pulse comprises a provision of a first reaction gas mixture to the process chamber, thereby forming the first epitaxial layer. The second deposition pulse comprises a provision of a second reaction gas mixture to the process chamber, thereby forming the second epitaxial layer. The first deposition pulse or the second deposition pulse further comprises a provision of a dopant precursor gas to the process chamber.

公开(公告)号：US20230420309A1

公开(公告)日：2023-12-28

申请号：US18212827

申请日：2023-06-22

Applicant: ASM IP Holding B.V.

Inventor： Omar Elleuch ,  Robinson James ,  Peter Westrom ,  Caleb Miskin ,  Alexandros Demos

IPC: H01L21/66 ,  H01L21/02 ,  H01L21/3065

CPC classification number: H01L22/20 ,  H01L21/02532 ,  H01L21/3065

Abstract: A method of forming silicon within a gap on a surface of a substrate. The method includes use of two or more pyrometers to measure temperatures at two or more positions on a substrate and/or a substrate support and a plurality of heaters that can be divided into zones of heaters, wherein the heaters or zones of heaters can be independently controlled based on the measured temperatures and desired temperature profiles.

公开(公告)号：US20230005744A1

公开(公告)日：2023-01-05

申请号：US17850370

申请日：2022-06-27

Applicant: ASM IP Holding B.V.

Inventor： Caleb Miskin ,  Omar Elleuch ,  Peter Westrom ,  Rami Khazaka ,  Qi Xie ,  Alexandros Demos

IPC: H01L21/02 ,  C23C16/455

Abstract: A method of forming a structure includes supporting a substrate within a reaction chamber of a semiconductor processing system, the substrate having a recess with a bottom surface and a sidewall surface extending upwards from the bottom surface of the recess. A film is deposited within the recess and onto the bottom surface and the sidewall surface of the recess, the film having a bottom segment overlaying the bottom surface of the recess and a sidewall segment deposited onto the sidewall surface of the recess. The sidewall segment of the film is removed while at least a portion bottom segment of the film is retained within the recess, the sidewall segment of the film removed from the sidewall surface more rapidly than removing the bottom segment of the film from the bottom surface of the recess. Semiconductor processing systems and structures formed using the method are also described.