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公开(公告)号:US20250021015A1
公开(公告)日:2025-01-16
申请号:US18705509
申请日:2022-10-26
Applicant: ASML NETHERLANDS B.V.
Inventor: Jin CHENG , Feng CHEN , Leiwu ZHENG , Yongfa FAN , Yen-Wen LU , Jen-Shiang WANG , Ziyang MA , Dianwen ZHU , Xi CHEN , Yu ZHAO
Abstract: An etch bias direction is determined based on a curvature of a contour in a substrate pattern. The etch bias direction is configured to be used to enhance an accuracy of a semiconductor patterning process relative to prior patterning processes. In some embodiments, a representation of the substrate pattern is received, which includes the contour in the substrate pattern. The curvature of the contour of the substrate pattern is determined, and an etch bias direction is determined based on the curvature by considering curvatures of adjacent contour portions. A simulation model is used to determine an etch effect based on the etch bias direction for an etching process on the substrate pattern.
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公开(公告)号:US20230314958A1
公开(公告)日:2023-10-05
申请号:US18207642
申请日:2023-06-08
Applicant: ASML NETHERLANDS B.V
Inventor: Yongfa FAN , Leiwu ZHENG , Mu FEN G , Qian ZHAO , Jen-Shiang WANG
CPC classification number: G03F7/705 , G03F1/80 , G03F7/70625 , H01L22/34
Abstract: A method involving determining an etch bias for a pattern to be etched using an etch step of a patterning process based on an etch bias model, the etch bias model including a formula having a variable associated with a spatial property of the pattern or with an etch plasma species concentration of the etch step, and including a mathematical term including a natural exponential function to the power of a parameter that is fitted or based on an etch time of the etch step; and adjusting the patterning process based on the determined etch bias.
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公开(公告)号:US20240385530A1
公开(公告)日:2024-11-21
申请号:US18565494
申请日:2022-05-29
Applicant: ASML NETHERLANDS B.V.
Inventor: Jiao HUANG , Jinze Wang , Yan YAN , Yongfa FAN , Liang Liu , Mu FENG
IPC: G03F7/00
Abstract: Etch bias is determined based on a curvature of a contour in a substrate pattern. The etch bias is configured to be used to enhance an accuracy of a semiconductor patterning process relative to prior patterning processes. In some embodiments, a representation of the substrate pattern is received, which includes the contour in the substrate pattern. The curvature of the contour of the substrate pattern is determined and inputted to a simulation model. The simulation model includes a correlation between etch biases and curvatures of contours. The etch bias for the contour in the substrate pattern is outputted by the simulation model based on the curvature.
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公开(公告)号:US20220299881A1
公开(公告)日:2022-09-22
申请号:US17636103
申请日:2020-08-01
Applicant: ASML NETHERLANDS B.V.
Inventor: Yunan ZHENG , Yongfa FAN , Mu FENG , Leiwu ZHENG , Jen-Shiang WANG , Ya LUO , Chenji ZHANG , Jun CHEN , Zhenyu HOU , Jinze WANG , Feng CHEN , Ziyang MA , Xin GUO , Jin CHENG
IPC: G03F7/20
Abstract: A method for generating modified contours and/or generating metrology gauges based on the modified contours. A method of generating metrology gauges for measuring a physical characteristic of a structure on a substrate includes obtaining (i) measured data associated with the physical characteristic of the structure printed on the substrate, and (ii) at least portion of a simulated contour of the structure, the at least a portion of the simulated contour being associated with the measured data; modifying, based on the measured data, the at least a portion of the simulated contour of the structure; and generating the metrology gauges on or adjacent to the modified at least a portion of the simulated contour, the metrology gauges being placed to measure the physical characteristic of the simulated contour of the structure.
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公开(公告)号:US20230161269A1
公开(公告)日:2023-05-25
申请号:US17919189
申请日:2021-05-07
Applicant: ASML NETHERLANDS B.V.
Inventor: Jiao HUANG , Yunan ZHENG , Qian ZHAO , Jiao LIANG , Yongfa FAN , Mu FENG
CPC classification number: G03F7/70633 , G03F7/70625 , G06T7/11 , G06T2207/10061
Abstract: Systems and methods for determining one or more characteristic metrics for a portion of a pattern on a substrate are described. Pattern information for the pattern on the substrate is received. The pattern on the substrate has first and second portions. The first portion of the pattern is blocked, for example with a geometrical block mask, based on the pattern information, such that the second portion of the pattern remains unblocked. The one or more metrics are determined for the unblocked second portion of the pattern. In some embodiments, the first and second portions of the pattern correspond to different exposures in a semiconductor lithography process. The semiconductor lithography process may be a multiple patterning technology process, for example, such as a double patterning process, a triple patterning process, or a spacer double patterning process.
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公开(公告)号:US20190354020A1
公开(公告)日:2019-11-21
申请号:US16484582
申请日:2018-02-21
Applicant: ASML NETHERLANDS B.V.
Inventor: Yongfa FAN , Leiwu ZHENG , Mu FENG , Qian ZHAO , Jen-Shiang WANG
Abstract: A method involving determining an etch bias for a pattern to be etched using an etch step of a patterning process based on an etch bias model, the etch bias model including a formula having a variable associated with a spatial property of the pattern or with an etch plasma species concentration of the etch step, and including a mathematical term including a natural exponential function to the power of a parameter that is fitted or based on an etch time of the etch step; and adjusting the patterning process based on the determined etch bias.
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公开(公告)号:US20240420025A1
公开(公告)日:2024-12-19
申请号:US18703486
申请日:2022-11-12
Applicant: ASML NETHERLANDS B.V.
Inventor: Jiaxing REN , Yongfa FAN , Yi-Yin CHEN , Chenji ZHANG , Leiwu ZHENG
Abstract: Machine learning models can be trained to predict imaging characteristics with respect to variation in a pattern on a wafer resulting from a patterning process. However, due to low pattern coverage provided by limited wafer data used for training, machine learning models tend to overfit, and predictions from the machine learning models deviate from physical trends that characterize the pattern on the wafer and/or the patterning process with respect to the pattern variation. To enhance pattern coverage, training data is augmented with pattern data that conforms to a certain expected physical trend, and applies to new patterns not covered by previously measured wafer data.
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公开(公告)号:US20220179321A1
公开(公告)日:2022-06-09
申请号:US17442662
申请日:2020-03-05
Applicant: ASML NETHERLANDS B.V.
Inventor: Ziyang MA , Jin CHENG , Ya LUO , Leiwu ZHENG , Xin GUO , Jen-Shiang WANG , Yongfa FAN , Feng CHEN , Yi-Yin CHEN , Chenji ZHANG , Yen- Wen LU
Abstract: A method for training a patterning process model, the patterning process model configured to predict a pattern that will be formed by a patterning process. The method involves obtaining an image data associated with a desired pattern, a measured pattern of the substrate, a first model including a first set of parameters, and a machine learning model including a second set of parameters; and iteratively determining values of the first set of parameters and the second set of parameters to train the patterning process model. An iteration involves executing, using the image data, the first model and the machine learning model to cooperatively predict a printed pattern of the substrate; and modifying the values of the first set of parameters and the second set of parameters such that a difference between the measured pattern and the predicted pattern is reduced.
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公开(公告)号:US20210294218A1
公开(公告)日:2021-09-23
申请号:US16324933
申请日:2017-07-27
Applicant: ASML NETHERLANDS B.V.
Inventor: Yongfa FAN , Mu FENG , Leiwu ZHENG , Qian ZHAO , Jen-Shiang WANG
IPC: G03F7/20
Abstract: A process to model post-exposure effects in patterning processes, the process including: obtaining values based on measurements of structures formed on one or more substrates by a post-exposure process and values of a pair of process parameters by which process conditions were varied; modeling, by a processor system, as a surface, correlation between the values based on measurements of the structures and the values of the pair of process parameters; and storing the model in memory.
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