公开(公告)号：US11079945B2

公开(公告)日：2021-08-03

申请号：US16137413

申请日：2018-09-20

申请人： ATI TECHNOLOGIES ULC

发明人： Omer Irshad ,  Joohyun Lee

IPC分类号： G06F3/00 ,  G06F3/06 ,  G06T1/60 ,  G06F3/0484 ,  G06F9/4401 ,  G06F13/16 ,  G06T1/20 ,  G06F3/0482

摘要： A processing system includes a memory controller coupleable to a RAM, and a ROM configured to store boot information that includes default values for a set of one or more memory timing parameters. At least one processor is configured to, during initialization, configure the memory controller to utilize the default values for the set of one or more memory timing parameters. The at least one processor further is configured to, during operation of the processing system following initialization, receive user input representing one or more updated values for one or more corresponding memory timing parameters of the set, and to dynamically reconfigure the memory controller to utilize one or more updated values for the set of one or more memory timing parameters for the signaling. The processing system further is configured to conduct one or more memory access operations for the RAM using the reconfigured memory controller.