公开(公告)号：US20210082338A1

公开(公告)日：2021-03-18

申请号：US16920777

申请日：2020-07-06

Applicant: AU Optronics Corporation

Inventor： Peng-Bo XI ,  Chen-Chi LIN ,  Cheng-Nan YEH

IPC: G09G3/32

Abstract: A display device including a driving chip and a pixel array is provided. The driving chip is configured to provide multiple emission control signals according to a data input. A pixel array is coupled with the driving chip. M pixel circuits of the pixel array are configured to emit light respectively in M periods, and M is a positive integer. In a corresponding period of the M periods, the driving chip determines a first time length which one of the multiple emission control signals has a first voltage level, and one of the M pixel circuits emits light, in the corresponding period, for a light emission time length corresponding to the first time length.

公开(公告)号：US20180336809A1

公开(公告)日：2018-11-22

申请号：US15981034

申请日：2018-05-16

Applicant: AU OPTRONICS CORPORATION

Inventor： Peng-Bo XI ,  Sung-Yu SU

IPC: G09G3/00 ,  G09G3/20

Abstract: A display panel includes: a display region, a plurality of data lines, a de-multiplexing circuit, and an operation switching circuit. The de-multiplexing circuit has a plurality of input terminals coupled to a plurality of data driving signal lines, a plurality of output terminals coupled to the plurality of data lines, and at least one de-multiplexing control terminal coupled to at least one driving control signal. The operation switching circuit is configured to switch a conduction status between the at least one de-multiplexing control terminal of the de-multiplexing circuit and a second control signal line according to a voltage of a first control signal line.

公开(公告)号：US20180174540A1

公开(公告)日：2018-06-21

申请号：US15836218

申请日：2017-12-08

Applicant: AU OPTRONICS CORPORATION

Inventor： Peng-Bo XI ,  Sung-Yu SU ,  Chen-Feng FAN

IPC: G09G3/36 ,  G02F1/139

CPC classification number: G09G3/3674 ,  G02F1/139 ,  G02F1/1396 ,  G02F2001/134381 ,  G09G3/3614 ,  G09G3/3655 ,  G09G3/3677 ,  G09G2300/0426

Abstract: A control circuit includes a switching circuit and a select circuit. The switching circuit is configured to receive a scan signal, a first switching signal, and a second switching signal, and output the first switching signal and the second switching signal according to the scan signal. The select circuit is configured to receive a first supply voltage, a second supply voltage, the first switching signal, and the second switching signal, and selectively output the first supply voltage or the second supply voltage to a target electrode according to the first switching signal and the second switching signal.

公开(公告)号：US20180240427A1

公开(公告)日：2018-08-23

申请号：US15787900

申请日：2017-10-19

Applicant: AU Optronics Corporation

Inventor： Peng-Bo XI ,  Sung-Yu SU

IPC: G09G3/36 ,  G11C19/38

CPC classification number: G09G3/3674 ,  G09G3/3266 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2310/0289 ,  G09G2310/08 ,  G11C19/28 ,  G11C19/38

Abstract: A gate driving circuit includes a plurality of shift register circuits, where the shift register circuits are configured to drive a plurality of pixel rows. The gate driving circuit may be operated in a first mode and a second mode. When the gate driving circuit is operated in the first mode, the gate driving circuit is configured to drive, in a single frame, all pixel rows to be displayed. When the gate driving circuit is operated in the second mode, the gate driving circuit is configured to drive, in the single frame, some of the pixel rows to be displayed, and driven pixel rows of two adjacent frames are different.

公开(公告)号：US20180081472A1

公开(公告)日：2018-03-22

申请号：US15678623

申请日：2017-08-16

Applicant: AU Optronics Corporation

Inventor： Peng-Bo XI ,  Sung-Yu SU

IPC: G06F3/041 ,  G06F3/044

CPC classification number: G06F3/0412 ,  G02F1/1323 ,  G02F2001/134381 ,  G06F3/044 ,  G09G3/3607 ,  G09G3/3614 ,  G09G2300/0447 ,  G09G2310/027 ,  G09G2320/068

Abstract: A touch display panel and a driving method thereof are disclosed. The touch display panel includes a plurality of pixels, a plurality of viewing angle control (VAC) electrode units, and a plurality of touch receiving electrode units. Each pixel includes a pixel electrode and a common electrode. At least one of the pixel electrode and the common electrode has a plurality of slits. The VAC electrode units are arranged along a first direction. Each VAC electrode unit includes a plurality of first VAC electrode series and a plurality of second VAC electrode series, and each first VAC electrode series and each second VAC electrode series are alternately arranged along the first direction. The touch receiving electrode units are arranged along the second direction, and the VAC electrode units and the touch receiving electrode unit form a touch unit.

公开(公告)号：US20170243559A1

公开(公告)日：2017-08-24

申请号：US15437589

申请日：2017-02-21

Applicant: AU Optronics Corporation

Inventor： Peng-Bo XI ,  Sung-Yu SU

IPC: G09G5/00 ,  H03K17/693

CPC classification number: G09G5/003 ,  G09G3/006 ,  G09G3/20 ,  G09G3/3614 ,  G09G2300/0408 ,  G09G2300/0452 ,  G09G2310/0235 ,  G09G2310/0254 ,  G09G2310/0291 ,  G09G2310/0297 ,  G09G2310/061 ,  H03K17/002 ,  H03K17/693

Abstract: A multiplexer is provided herein. The multiplexer has a plurality of first driving units and a plurality of second driving units. Each of the first driving units has a first data voltage input terminal, and each of the second driving units has a second data voltage input terminal. The first data voltage input terminal and the second data voltage input terminal are configured to receive pixel voltage signals with different polarities. In the first driving unit, a voltage difference between a gate and a drain of a transistor is controlled by a first reset signal, wherein the transistor of the first driving unit is coupled to the first data voltage input terminal and a first data line. In the second driving unit, a voltage difference between a gate and a drain of a transistor is controlled by a second reset signal, wherein the transistor of the second driving unit is coupled to the second data voltage input terminal and a second data line.

公开(公告)号：US20200126506A1

公开(公告)日：2020-04-23

申请号：US16723346

申请日：2019-12-20

Applicant: AU Optronics Corporation

Inventor： Peng-Bo XI ,  Sung-Yu SU

IPC: G09G5/00 ,  H03K17/693 ,  G09G3/36 ,  G09G3/20 ,  G09G3/00

Abstract: A multiplexer is provided herein. The multiplexer has a plurality of first driving units and a plurality of second driving units. Each of the first driving units has a first data voltage input terminal, and each of the second driving units has a second data voltage input terminal. The first data voltage input terminal and the second data voltage input terminal are configured to receive pixel voltage signals with different polarities. In the first driving unit, a voltage difference between a gate and a drain of a transistor is controlled by a first reset signal, wherein the transistor of the first driving unit is coupled to the first data voltage input terminal and a first data line. In the second driving unit, a voltage difference between a gate and a drain of a transistor is controlled by a second reset signal, wherein the transistor of the second driving unit is coupled to the second data voltage input terminal and a second data line.

公开(公告)号：US20190326751A1

公开(公告)日：2019-10-24

申请号：US16385003

申请日：2019-04-16

Applicant: AU Optronics Corporation

Inventor： Peng-Bo XI

IPC: H02H9/04

Abstract: An ESD protection circuit includes a first diode element, a second diode element, a first clamping circuit, a second clamping circuit, and a protection circuit. The first diode element is coupled between a first power node and an input node, wherein the input node is coupled with an internal circuit. The second diode element is coupled between a second power node and the input node. The first clamping circuit is coupled between the first power node and the second power node. The second clamping circuit is coupled between the second power node and the input node. The protection circuit is coupled between the first power node and the second power node, and configured to transmit a current corresponding to an ESD event to a grounded capacitor.

公开(公告)号：US20190073985A1

公开(公告)日：2019-03-07

申请号：US15925951

申请日：2018-03-20

Applicant: AU OPTRONICS CORPORATION

Inventor： Peng-Bo XI ,  Sung-Yu SU

IPC: G09G5/10

Abstract: A display device includes a plurality of sub pixels, a first data line, and a second data line. The first data line is configured to provide a first pixel voltage to a first sub pixel of the sub pixels, and the first sub pixel has a first color. The second data line is configured to provide a second pixel voltage to a second sub pixel of the sub pixels, and the second sub pixel has the first color. The first data line and the second data line are disposed between two adjacent sub pixels of the sub pixels. Polarities of the first pixel voltage and the second pixel voltage are different.

公开(公告)号：US20180284542A1

公开(公告)日：2018-10-04

申请号：US15802017

申请日：2017-11-02

Applicant: AU OPTRONICS CORPORATION

Inventor： Peng-Bo XI ,  Sung-Yu SU ,  Chu-Hsuan I

IPC: G02F1/1337 ,  G02F1/1362 ,  G02F1/1368 ,  H01L27/12

CPC classification number: G02F1/133707 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/133357 ,  G02F2001/136295 ,  H01L27/1244 ,  H01L27/1259

Abstract: A method for manufacturing a pixel unit includes the following steps. A channel layer is formed. A first pattern layer is formed above the channel layer and includes a scan line and a gate electrode. A second pattern layer is formed above the first pattern layer and includes a data line and a source electrode, where the source electrode is electrically connected to the channel layer. A third pattern layer is formed above the second pattern layer and includes a drain electrode and an auxiliary electrode, where the drain electrode is electrically connected to the channel layer. The auxiliary electrode is electrically connected to the scan line through a first contact hole.