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    Embedded video player
    3.
    发明授权
    Embedded video player 有权
    嵌入式视频播放器

    公开(公告)号：US08069414B2

    公开(公告)日：2011-11-29

    申请号：US11779856

    申请日：2007-07-18

    Applicant: Gunthar Hartwig ,  Jasson Schrock ,  Nikhil Chandhok ,  Christian Oestlien ,  Aaron Lee

    Inventor： Gunthar Hartwig ,  Jasson Schrock ,  Nikhil Chandhok ,  Christian Oestlien ,  Aaron Lee

    IPC: G06F3/00 ,  G06F17/00 ,  H04N7/173 ,  H04N7/16

    CPC classification number: G06F17/30781

    Abstract: A system, method and various user interfaces provide an embedded web-based video player for navigating video playlists and playing video content. A website publisher can create and store a video player with customized parameters (e.g., player type, appearance, advertising options, etc.) and can associate the player with a playlist of selected videos. The stored video player is associated with a player ID in a player database and can be embedded in a website using an embed code referencing the player ID. A user interface for the embedded player provides controls for controlling video playback and for controlling the selection of a video from the playlist.

    Abstract translation: 系统，方法和各种用户界面提供用于导航视频播放列表和播放视频内容的嵌入式基于网络的视频播放器。 网站发布商可以创建并存储具有定制参数（例如，玩家类型，外观，广告选项等）的视频播放器，并且可以将玩家与所选视频的播放列表相关联。 存储的视频播放器与播放器数据库中的播放器ID相关联，并且可以使用引用播放器ID的嵌入代码嵌入到网站中。 用于嵌入式播放器的用户界面提供用于控制视频播放和控制从播放列表中选择视频的控制。

    Charge-sharing technique during flash memory programming
    5.
    发明授权
    Charge-sharing technique during flash memory programming 有权
    闪存编程中的电荷共享技术

    公开(公告)号：US07196938B1

    公开(公告)日：2007-03-27

    申请号：US11229530

    申请日：2005-09-20

    Applicant: Yonggang Wu ,  Guowei Wang ,  Nian Yang ,  Aaron Lee

    Inventor： Yonggang Wu ,  Guowei Wang ,  Nian Yang ,  Aaron Lee

    IPC: G11C16/04

    CPC classification number: G11C16/12

    Abstract: A non-volatile memory cell array, such as a Flash NOR array, is programmed by applying voltages to bit lines that connect to memory cells in the memory cell array. A first bit line corresponding to a first memory cell in the memory array may be turned on to perform a first programming operation for the first memory cell and second bit line corresponding to a second memory cell in the memory array may be turned on to perform a second programming operation that is configured to complete after the first programming operation. The turning on/off of the first and second bit lines may be overlapped to share charge between the first and second bit lines. This overlapping can reduce wasted power and decrease programming pulse overshoot problems.

    Abstract translation: 诸如闪存NOR阵列的非易失性存储单元阵列通过将电压施加到连接到存储单元阵列中的存储单元的位线来编程。 对应于存储器阵列中的第一存储器单元的第一位线可以被接通以对第一存储器单元执行第一编程操作，并且可以打开与存储器阵列中的第二存储器单元相对应的第二位线来执行 第二编程操作被配置为在第一编程操作之后完成。 第一和第二位线的导通/截止可以重叠以在第一和第二位线之间共享电荷。 这种重叠可以减少浪费的功率并减少编程脉冲过冲问题。

    Bundle generation
    7.
    发明授权
    Bundle generation 有权
    捆绑代

    公开(公告)号：US09064024B2

    公开(公告)日：2015-06-23

    申请号：US11842732

    申请日：2007-08-21

    Applicant: Christian Oestlien ,  Aaron Lee

    Inventor： Christian Oestlien ,  Aaron Lee

    IPC: G06F17/30

    CPC classification number: G06F17/30598 ,  G06F17/3089

    Abstract: First topics related to a content page, such as a web page, are identified. Thereafter, second topics related to a first content element, such as advertisements, and a second content element, such as media files, are identified based on the first topics. Common topics are identified that are common to the first and second topics. Based on the common topics, first and second content elements are identified and combined in a bundle that is transmitted to a user requesting the content page.

    Abstract translation: 识别与内容页面（例如网页）相关的第一主题。 此后，基于第一主题来识别与第一内容元素（例如广告）相关的第二主题以及诸如媒体文件的第二内容元素。 确定了第一和第二主题通用的常见主题。 基于共同的主题，第一和第二内容元素被识别并组合成被发送给请求内容页面的用户的包。

    Flash memory programming power reduction
    8.
    发明授权
    Flash memory programming power reduction 有权
    闪存编程功耗降低

    公开(公告)号：US07957204B1

    公开(公告)日：2011-06-07

    申请号：US11229667

    申请日：2005-09-20

    Applicant: Yonggang Wu ,  Guowei Wang ,  Nian Yang ,  Sachit Chandra ,  Aaron Lee

    Inventor： Yonggang Wu ,  Guowei Wang ,  Nian Yang ,  Sachit Chandra ,  Aaron Lee

    IPC: G11C7/12 ,  G11C8/08 ,  G11C8/12 ,  G11C16/12

    CPC classification number: G11C16/12 ,  G11C5/145 ,  G11C8/08

    Abstract: A non-volatile memory device includes an array of non-volatile memory cells. When programming the memory cells, a voltage supply source is used that includes multiple independent charge pumps. The independent charge pumps supply the programming voltage to different ones of bit lines in the array of memory cells. Using multiple charge pumps tends to reduce output voltage fluctuations and thereby reduce power loss.

    Abstract translation: 非易失性存储器件包括非易失性存储器单元阵列。 当对存储器单元进行编程时，使用包括多个独立电荷泵的电压源。 独立电荷泵将编程电压提供给存储器单元阵列中的不同位线。 使用多个电荷泵倾向于降低输出电压波动，从而降低功率损耗。

    Keyboard with back-lighted ultra-durable keys
    9.
    发明申请
    Keyboard with back-lighted ultra-durable keys 有权
    键盘带背光超耐用键

    公开(公告)号：US20100252407A1

    公开(公告)日：2010-10-07

    申请号：US12647543

    申请日：2009-12-28

    Applicant: Baptiste Merminod ,  Peter Mah ,  Eric Hsu ,  Aaron Lee ,  Jero Chen ,  Linus Chien ,  Eric Su

    Inventor： Baptiste Merminod ,  Peter Mah ,  Eric Hsu ,  Aaron Lee ,  Jero Chen ,  Linus Chien ,  Eric Su

    IPC: H01H13/76 ,  H01H9/18

    CPC classification number: H01H3/125 ,  B29C45/16 ,  B29L2031/466 ,  H01H11/00 ,  H01H13/70 ,  H01H13/83 ,  H01H2009/187 ,  H01H2209/052 ,  H01H2219/028 ,  H01H2219/062 ,  H01H2223/002

    Abstract: A key for a keyboard includes a keycap having a top surface configured to be contacted for pressing the key down, and having a bottom. The keycap is substantially transparent. An intermediate layer is coupled to the bottom of the keycap. The intermediate layer is translucent and includes a top and a bottom. The top of the intermediate layer faces the bottom of the keycap. A character layer is positioned between the bottom of the keycap and the top of the intermediate layer. A resilient member is coupled to the bottom of the intermediate layer. The resilient member is translucent and is configured to direct light through the intermediate layer, through the character layer, and out from the keycap. The character layer is configured to be lighted for viewing through the keycap.

    Abstract translation: 键盘的键包括键帽，其具有被配置为接触以压下钥匙的顶表面，并具有底部。 键帽基本上是透明的。 中间层耦合到键帽的底部。 中间层是半透明的并且包括顶部和底部。 中间层的顶部面向键帽的底部。 字符层位于键帽的底部和中间层的顶部之间。 弹性构件联接到中间层的底部。 弹性构件是半透明的，并且被配置成将光引导通过中间层，穿过字符层，并从键帽出来。 字符层被配置为点亮以通过键帽观看。

    Flash memory device with external high voltage supply
    10.
    发明授权
    Flash memory device with external high voltage supply 有权
    具有外部高压电源的闪存设备

    公开(公告)号：US07626882B2

    公开(公告)日：2009-12-01

    申请号：US11613383

    申请日：2006-12-20

    Applicant: Nian Yang ,  Yonggang Wu ,  Aaron Lee ,  Wei Daisy Cai

    Inventor： Nian Yang ,  Yonggang Wu ,  Aaron Lee ,  Wei Daisy Cai

    IPC: G11C5/14

    CPC classification number: G11C16/12

    Abstract: A semiconductor memory device (104) selectably connectable to an external high voltage power supply (122) is provided. The semiconductor memory device (104) includes a switch (314), a detector (316) and a timing device (318). The switch (314) is connected to external voltage supply signals and selectably couples the external voltage supply signals to memory cells (305) of the semiconductor memory device (104) for memory operations thereof. The external voltage supply signals including a high voltage signal (412) provided from the external high voltage power supply (122) and an operational voltage signal Vcc (402). The detector (316) is connected to the external voltage supply signals for generating a timer activation signal (404) in response to detecting an operational voltage power-on period. The timing device (318) signals the switch (314) to decouple the high voltage signal (412) and the operational voltage signal (402) from the memory cells (305) in response to the timer activation signal (404) and to recouple the high voltage signal (412) and the operational voltage signal (402) to the memory cells (305) a time delay interval thereafter. The time delay interval is determined in response to the high voltage signal (412).

    Abstract translation: 提供可选择地连接到外部高压电源（122）的半导体存储器件（104）。 半导体存储器件（104）包括开关（314），检测器（316）和定时装置（318）。 开关（314）连接到外部电压源信号，并且可选择地将外部电压供应信号耦合到半导体存储器件（104）的存储单元（305），用于存储器操作。 包括从外部高压电源（122）提供的高电压信号（412）的外部电压供给信号和操作电压信号Vcc（402）。 检测器（316）连接到外部电压源信号，以响应于检测到工作电压通电周期而产生定时器激活信号（404）。 定时装置（318）响应于定时器启动信号（404），向开关314通知高压信号412和操作电压信号402与存储单元305的耦合， 高电压信号（412）和操作电压信号（402）到其后的时间延迟区间。 响应于高电压信号确定时间延迟间隔（412）。

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