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    Multi-level cell (MLC) dual personality extended fiber optic flash memory device
    1.
    发明授权
    Multi-level cell (MLC) dual personality extended fiber optic flash memory device 失效
    多级单元（MLC）双重人格扩展光纤闪存设备

    公开(公告)号：US08061905B2

    公开(公告)日：2011-11-22

    申请号：US12111872

    申请日：2008-04-29

    申请人： Abraham Ma ,  I-Kang Yu ,  David Nguyen ,  Charles C. Lee ,  Ming-Shiang Shen

    发明人： Abraham Ma ,  I-Kang Yu ,  David Nguyen ,  Charles C. Lee ,  Ming-Shiang Shen

    IPC分类号： G02B6/38

    CPC分类号： G06K19/07732

    摘要： A multi-level cell (MLC) dual-personality extended fiber optic flash drive includes a MLC dual-personality extended fiber optic Universal Serial Bus (USB) plug connector connected to a dual-personality extended fiber optic flash drive and being removably connectable to a host. The connector is adaptable to receive electrical data and optical data. A transceiver, located on the flash drive, is operative to convert received electrical data to optical data or to convert received optical data to electrical data.

    摘要翻译： 多级单元（MLC）双人格扩展光纤闪存驱动器包括连接到双人格扩展光纤闪存驱动器的MLC双人格扩展光纤通用串行总线（USB）插头连接器，并且可移除地连接到 主办。 该连接器适用于接收电气数据和光学数据。 位于闪存驱动器上的收发器用于将接收的电数据转换为光学数据或将接收到的光学数据转换为电气数据。

    Methods and systems of managing memory addresses in a large capacity multi-level cell (MLC) based flash memory device
    3.
    发明授权
    Methods and systems of managing memory addresses in a large capacity multi-level cell (MLC) based flash memory device 失效
    在基于大容量多级单元（MLC）的闪存设备中管理存储器地址的方法和系统

    公开(公告)号：US07886108B2

    公开(公告)日：2011-02-08

    申请号：US12025706

    申请日：2008-02-04

    申请人： Charles C. Lee ,  I-Kang Yu ,  David Nguyen ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

    发明人： Charles C. Lee ,  I-Kang Yu ,  David Nguyen ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

    IPC分类号： G06F13/16

    CPC分类号： G06F12/0246 ,  G06F12/0607 ,  G11C11/5621 ,  G11C16/0408 ,  G11C16/349 ,  G11C16/3495

    摘要： Methods and systems of managing memory addresses in a large capacity multi-level cell based flash memory device are described. According to one aspect, a flash memory device comprises a processing unit to manage logical-to-physical address correlation using an indexing scheme. The flash memory is partitioned into N sets. Each set includes a plurality of entries (i.e., blocks). N sets of partial logical entry number to physical block number and associated page usage information (hereinafter ‘PLTPPUI’) are stored in the reserved area of the MLC based flash memory. Only one the N sets is loaded to address correlation and page usage memory (ACPUM), which is a limited size random access memory (RAM). In one embodiment, static RAM (SRAM) is implemented for fast access time for the address correlation. LSA received together with the data transfer request dictates which one of the N sets of PLTPPUI is loaded into ACPUM.

    摘要翻译： 描述了在大容量多级基于单元的闪存设备中管理存储器地址的方法和系统。 根据一个方面，一种闪存设备包括一个使用索引方案来管理逻辑到物理地址相关的处理单元。 闪存被分为N组。 每个集合包括多个条目（即，块）。 对于物理块号和相关联的页面使用信息（以下称为“PLTPPUI”）的N组部分逻辑条目号被存储在基于MLC的闪速存储器的保留区域中。 只有一个N集被加载以寻址相关和页面使用存储器（ACPUM），这是一个有限大小的随机存取存储器（RAM）。 在一个实施例中，静态RAM（SRAM）被实现用于地址相关的快速访问时间。 与数据传输请求一起接收的LSA指示将N组PLTPPUI中的哪一个加载到ACPUM中。

    Methods and systems of managing memory addresses in a large capacity multi-level cell (MLC) based flash memory device
    4.
    发明申请
    Methods and systems of managing memory addresses in a large capacity multi-level cell (MLC) based flash memory device 失效
    在基于大容量多级单元（MLC）的闪存设备中管理存储器地址的方法和系统

    公开(公告)号：US20080256287A1

    公开(公告)日：2008-10-16

    申请号：US12025706

    申请日：2008-02-04

    申请人： Charles C. Lee ,  I-Kang Yu ,  David Nguyen ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

    发明人： Charles C. Lee ,  I-Kang Yu ,  David Nguyen ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

    IPC分类号： G06F12/02

    CPC分类号： G06F12/0246 ,  G06F12/0607 ,  G11C11/5621 ,  G11C16/0408 ,  G11C16/349 ,  G11C16/3495

    摘要： Methods and systems of managing memory addresses in a large capacity multi-level cell based flash memory device are described. According to one aspect, a flash memory device comprises a processing unit to manage logical-to-physical address correlation using an indexing scheme. The flash memory is partitioned into N sets. Each set includes a plurality of entries (i.e., blocks). N sets of partial logical entry number to physical block number and associated page usage information (hereinafter ‘PLTPPUI’) are stored in the reserved area of the MLC based flash memory. Only one the N sets is loaded to address correlation and page usage memory (ACPUM), which is a limited size random access memory (RAM). In one embodiment, static RAM (SRAM) is implemented for fast access time for the address correlation. LSA received together with the data transfer request dictates which one of the N sets of PLTPPUI is loaded into ACPUM.

    摘要翻译： 描述了在大容量多级基于单元的闪存设备中管理存储器地址的方法和系统。 根据一个方面，一种闪存设备包括一个使用索引方案来管理逻辑到物理地址相关的处理单元。 闪存被分为N组。 每个集合包括多个条目（即，块）。 对于物理块号和相关联的页面使用信息（以下称为“PLTPPUI”）的N组部分逻辑条目号被存储在基于MLC的闪速存储器的保留区域中。 只有一个N集被加载以寻址相关和页面使用存储器（ACPUM），这是一个有限大小的随机存取存储器（RAM）。 在一个实施例中，静态RAM（SRAM）被实现用于地址相关的快速访问时间。 与数据传输请求一起接收的LSA指示将N组PLTPPUI中的哪一个加载到ACPUM中。

    Memory address management systems in a large capacity multi-level cell (MLC) based flash memory device
    5.
    发明授权
    Memory address management systems in a large capacity multi-level cell (MLC) based flash memory device 有权
    大容量多级单元（MLC）闪存设备中的内存地址管理系统

    公开(公告)号：US08015348B2

    公开(公告)日：2011-09-06

    申请号：US12980591

    申请日：2010-12-29

    申请人： Charles C. Lee ,  I-Kang Yu ,  David Nguyen ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

    发明人： Charles C. Lee ,  I-Kang Yu ,  David Nguyen ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

    IPC分类号： G06F12/08

    CPC分类号： H05K1/182 ,  G06F12/00 ,  H01R13/447 ,  H05K1/181 ,  H05K5/0278 ,  H05K2201/10189 ,  H05K2201/10446 ,  H05K2203/1572

    摘要： Methods and systems of managing memory addresses in a large capacity multi-level cell based flash memory device are described. According to one aspect, a flash memory device comprises a processing unit to manage logical-to-physical address correlation using an indexing scheme. The flash memory is partitioned into N sets. Each set includes a plurality of entries (i.e., blocks). N sets of partial logical entry number to physical block number and associated page usage information (hereinafter ‘PLTPPUI’) are stored in the reserved area of the MLC based flash memory. Only one the N sets is loaded to address correlation and page usage memory (ACPUM), which is a limited size random access memory (RAM). In one embodiment, static RAM (SRAM) is implemented for fast access time for the address correlation. LSA received together with the data transfer request dictates which one of the N sets of PLTPPUI is loaded into ACPUM.

    摘要翻译： 描述了在大容量多级基于单元的闪存设备中管理存储器地址的方法和系统。 根据一个方面，一种闪存设备包括一个使用索引方案来管理逻辑到物理地址相关的处理单元。 闪存被分为N组。 每个集合包括多个条目（即，块）。 对于物理块号和相关联的页面使用信息（以下称为“PLTPPUI”）的N组部分逻辑条目号被存储在基于MLC的闪速存储器的保留区域中。 只有一个N集被加载以寻址相关和页面使用存储器（ACPUM），这是一个有限大小的随机存取存储器（RAM）。 在一个实施例中，静态RAM（SRAM）被实现用于地址相关的快速访问时间。 与数据传输请求一起接收的LSA指示将N组PLTPPUI中的哪一个加载到ACPUM中。

    MEMORY ADDRESS MANAGEMENT SYSTEMS IN A LARGE CAPACITY MULTI-LEVEL CELL (MLC) BASED FLASH MEMORY DEVICE
    6.
    发明申请
    MEMORY ADDRESS MANAGEMENT SYSTEMS IN A LARGE CAPACITY MULTI-LEVEL CELL (MLC) BASED FLASH MEMORY DEVICE 有权
    基于大容量多级电池（MLC）的闪存存储器件中的存储器地址管理系统

    公开(公告)号：US20110093653A1

    公开(公告)日：2011-04-21

    申请号：US12980591

    申请日：2010-12-29

    申请人： Charles C. Lee ,  I-Kang Yu ,  David Nguyen ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

    发明人： Charles C. Lee ,  I-Kang Yu ,  David Nguyen ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

    IPC分类号： G06F12/00

    CPC分类号： H05K1/182 ,  G06F12/00 ,  H01R13/447 ,  H05K1/181 ,  H05K5/0278 ,  H05K2201/10189 ,  H05K2201/10446 ,  H05K2203/1572

    摘要： Methods and systems of managing memory addresses in a large capacity multi-level cell based flash memory device are described. According to one aspect, a flash memory device comprises a processing unit to manage logical-to-physical address correlation using an indexing scheme. The flash memory is partitioned into N sets. Each set includes a plurality of entries (i.e., blocks). N sets of partial logical entry number to physical block number and associated page usage information (hereinafter ‘PLTPPUI’) are stored in the reserved area of the MLC based flash memory. Only one the N sets is loaded to address correlation and page usage memory (ACPUM), which is a limited size random access memory (RAM). In one embodiment, static RAM (SRAM) is implemented for fast access time for the address correlation. LSA received together with the data transfer request dictates which one of the N sets of PLTPPUI is loaded into ACPUM.

    摘要翻译： 描述了在大容量多级基于单元的闪存设备中管理存储器地址的方法和系统。 根据一个方面，一种闪存设备包括一个使用索引方案来管理逻辑到物理地址相关的处理单元。 闪存被分为N组。 每个集合包括多个条目（即，块）。 对于物理块号和相关联的页面使用信息（以下称为“PLTPPUI”）的N组部分逻辑条目号被存储在基于MLC的闪速存储器的保留区域中。 只有一个N集被加载以寻址相关和页面使用存储器（ACPUM），这是一个有限大小的随机存取存储器（RAM）。 在一个实施例中，静态RAM（SRAM）被实现用于地址相关的快速访问时间。 与数据传输请求一起接收的LSA指示将N组PLTPPUI中的哪一个加载到ACPUM中。

    Electronic Data Flash Card with Reed Solomon Error Detection and Correction Capability
    7.
    发明申请
    Electronic Data Flash Card with Reed Solomon Error Detection and Correction Capability 失效
    具有Reed Solomon错误检测和校正能力的电子数据闪存卡

    公开(公告)号：US20070204206A1

    公开(公告)日：2007-08-30

    申请号：US11739613

    申请日：2007-04-24

    申请人： Charles Lee ,  I-Kang Yu ,  Abraham Ma ,  Ming-Shiang Shen

    发明人： Charles Lee ,  I-Kang Yu ,  Abraham Ma ,  Ming-Shiang Shen

    IPC分类号： H03M13/05

    CPC分类号： H03M13/1545 ,  G06F11/1068 ,  G06F11/1076 ,  H03M13/153 ,  H03M13/1535 ,  H03M13/6561

    摘要： One embodiment of the present includes a electronic data storage card having a Reed Solomon (RS) decoder having a syndrome calculator block responsive to a page of information, the page being organized into a plurality of data sections and the overhead being organized into a plurality of overhead sections. The syndrome calculator generates a syndrome for each of the data sections. The decoder further includes a root finder block responsive to the calculated syndrome and for generating at least two roots, a polynomial calculator block responsive to the at least two roots and operative to generate at least one error address, identifying a location in the data wherein the error lies, and an error symbol values calculator block coupled to the root finder and the polynomial calculator block and for generating a second error address, identifying a second location in the data wherein the error(s) lie.

    摘要翻译： 本发明的一个实施例包括具有Reed Solomon（RS）解码器的电子数据存储卡，该解码器具有响应于信息页的校正子计算器块，该页被组织成多个数据段，并且开销被组织成多个 架空部分。 综合征计算器为每个数据部分产生综合征。 解码器还包括响应于所计算的校正子并用于生成至少两个根的根取景器块，响应于至少两个根并且可操作地生成至少一个错误地址的多项式计算器块，识别数据中的位置，其中， 并且错误符号值计算器块耦合到根查找器和多项式计算器块，并用于产生第二错误地址，识别错误所在的数据中的第二位置。

    MP3 Player with Digital Rights Management
    8.
    发明申请
    MP3 Player with Digital Rights Management 失效
    具有数字版权管理的MP3播放器

    公开(公告)号：US20070150963A1

    公开(公告)日：2007-06-28

    申请号：US11668316

    申请日：2007-01-29

    申请人： Charles Lee ,  I-Kang Yu ,  Abraham Ma ,  Ming-Shiang Shen

    发明人： Charles Lee ,  I-Kang Yu ,  Abraham Ma ,  Ming-Shiang Shen

    IPC分类号： H04L9/32

    CPC分类号： G06F21/32 ,  G06F21/10 ,  G06F2221/2129

    摘要： A portable media player receives encrypted audio files and an encrypted content key from a central license server on the Internet. The media player supports digital rights management (DRM) by storing the encrypted audio file in its flash memory and disabling copying or playing of the audio file after a copy limit has been reached. The copy limit is a rule that is combined with the content key in a transfer key that can be encrypted together by the license server. The license server can detect cloning of the media player by reading a unique player ID from the player and detecting when too many accounts use the same unique player ID. The content key can be generated from polar coordinates of the unique player ID, player manufacturer, and song genre. A fingerprint sensor on the player can scan and compare the user's fingerprints to further detect cloning.

    摘要翻译： 便携式媒体播放器从互联网上的中央许可证服务器接收加密的音频文件和加密的内容密钥。 媒体播放器通过将加密的音频文件存储在其闪存中来支持数字权限管理（DRM），并且在达到复制限制之后禁用复制或播放音频文件。 复制限制是与许可证服务器可一起加密的传输密钥中的内容密钥相结合的规则。 许可证服务器可以通过从播放器中读取唯一的播放器ID来检测媒体播放器的克隆，并检测何时太多的帐户使用相同的唯一播放器ID。 内容密钥可以由唯一播放器ID，播放器制造商和歌曲类型的极坐标生成。 播放器上的指纹传感器可以扫描并比较用户的指纹，以进一步检测克隆。

    Data security for electronic data flash card
    10.
    发明授权
    Data security for electronic data flash card 有权
    电子数据闪存卡的数据安全

    公开(公告)号：US07873837B1

    公开(公告)日：2011-01-18

    申请号：US11685143

    申请日：2007-03-12

    申请人： Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

    发明人： Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

    IPC分类号： G06F21/00 ,  H04L9/00 ,  H04K1/00

    CPC分类号： G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087

    摘要： An electronic data flash card includes a random number generator that generates a random number stored in the card and a host system each time the card is accessed by the host system. The random number is used by the host system to encrypt a logical branch address, a user password, and user data that is written to and stored in a secure area of the card. The random number is encrypted using a key associated with the card, and the encrypted random number is stored by the card with the associated encrypted data. The random number is not stored in the host system. A new random number is generated each time the card is queried. In a read process the host system decrypts the encrypted random number using the key, then uses the random number to decrypt the associated encrypted data. Access to read/write processes are password protected.

    摘要翻译： 电子数据闪存卡包括随机数生成器，其生成存储在卡中的随机数，以及每次主机系统访问卡时的主机系统。 主机系统使用随机数来加密逻辑分支地址，用户密码和写入并存储在卡的安全区域中的用户数据。 使用与该卡相关联的密钥对该随机数进行加密，并且加密随机数由卡与相关联的加密数据一起存储。 随机数不存储在主机系统中。 每次查询卡片时都会产生一个新的随机数字。 在读取过程中，主机系统使用密钥解密加密的随机数，然后使用随机数来解密相关联的加密数据。 对读/写进程的访问受密码保护。