公开(公告)号：US08061905B2

公开(公告)日：2011-11-22

申请号：US12111872

申请日：2008-04-29

申请人： Abraham Ma ,  I-Kang Yu ,  David Nguyen ,  Charles C. Lee ,  Ming-Shiang Shen

发明人： Abraham Ma ,  I-Kang Yu ,  David Nguyen ,  Charles C. Lee ,  Ming-Shiang Shen

IPC分类号： G02B6/38

CPC分类号： G06K19/07732

摘要： A multi-level cell (MLC) dual-personality extended fiber optic flash drive includes a MLC dual-personality extended fiber optic Universal Serial Bus (USB) plug connector connected to a dual-personality extended fiber optic flash drive and being removably connectable to a host. The connector is adaptable to receive electrical data and optical data. A transceiver, located on the flash drive, is operative to convert received electrical data to optical data or to convert received optical data to electrical data.

摘要翻译： 多级单元（MLC）双人格扩展光纤闪存驱动器包括连接到双人格扩展光纤闪存驱动器的MLC双人格扩展光纤通用串行总线（USB）插头连接器，并且可移除地连接到 主办。 该连接器适用于接收电气数据和光学数据。 位于闪存驱动器上的收发器用于将接收的电数据转换为光学数据或将接收到的光学数据转换为电气数据。

公开(公告)号：US20080318449A1

公开(公告)日：2008-12-25

申请号：US12113023

申请日：2008-04-30

申请人： Abraham Ma ,  I-Kang Yu ,  David Nguyen ,  Charles C. Lee ,  Ming-Shiang Shen

发明人： Abraham Ma ,  I-Kang Yu ,  David Nguyen ,  Charles C. Lee ,  Ming-Shiang Shen

IPC分类号： H01R24/00 ,  H01R12/00 ,  G06K9/00

CPC分类号： H01R29/00

摘要： A multi-level cell (MLC) dual-personality extended External Serial Advanced Technology Attachment (eSATA) flash drive includes a MLC dual-personality extended eSATA plug connector connected to a flash drive and removably connectable to a host. The connector is adaptable to receive electoral data from both a USB and eSATA interface.

摘要翻译： 多级单元（MLC）双人格扩展外部串行高级技术附件（eSATA）闪存驱动器包括连接到闪存驱动器并可拆卸地连接到主机的MLC双人格扩展eSATA插头连接器。 该连接器适用于从USB和eSATA接口接收选举数据。

公开(公告)号：US08015348B2

公开(公告)日：2011-09-06

申请号：US12980591

申请日：2010-12-29

申请人： Charles C. Lee ,  I-Kang Yu ,  David Nguyen ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

发明人： Charles C. Lee ,  I-Kang Yu ,  David Nguyen ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

IPC分类号： G06F12/08

CPC分类号： H05K1/182 ,  G06F12/00 ,  H01R13/447 ,  H05K1/181 ,  H05K5/0278 ,  H05K2201/10189 ,  H05K2201/10446 ,  H05K2203/1572

摘要： Methods and systems of managing memory addresses in a large capacity multi-level cell based flash memory device are described. According to one aspect, a flash memory device comprises a processing unit to manage logical-to-physical address correlation using an indexing scheme. The flash memory is partitioned into N sets. Each set includes a plurality of entries (i.e., blocks). N sets of partial logical entry number to physical block number and associated page usage information (hereinafter ‘PLTPPUI’) are stored in the reserved area of the MLC based flash memory. Only one the N sets is loaded to address correlation and page usage memory (ACPUM), which is a limited size random access memory (RAM). In one embodiment, static RAM (SRAM) is implemented for fast access time for the address correlation. LSA received together with the data transfer request dictates which one of the N sets of PLTPPUI is loaded into ACPUM.

摘要翻译： 描述了在大容量多级基于单元的闪存设备中管理存储器地址的方法和系统。 根据一个方面，一种闪存设备包括一个使用索引方案来管理逻辑到物理地址相关的处理单元。 闪存被分为N组。 每个集合包括多个条目（即，块）。 对于物理块号和相关联的页面使用信息（以下称为“PLTPPUI”）的N组部分逻辑条目号被存储在基于MLC的闪速存储器的保留区域中。 只有一个N集被加载以寻址相关和页面使用存储器（ACPUM），这是一个有限大小的随机存取存储器（RAM）。 在一个实施例中，静态RAM（SRAM）被实现用于地址相关的快速访问时间。 与数据传输请求一起接收的LSA指示将N组PLTPPUI中的哪一个加载到ACPUM中。

公开(公告)号：US07886108B2

公开(公告)日：2011-02-08

申请号：US12025706

申请日：2008-02-04

申请人： Charles C. Lee ,  I-Kang Yu ,  David Nguyen ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

发明人： Charles C. Lee ,  I-Kang Yu ,  David Nguyen ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

IPC分类号： G06F13/16

CPC分类号： G06F12/0246 ,  G06F12/0607 ,  G11C11/5621 ,  G11C16/0408 ,  G11C16/349 ,  G11C16/3495

摘要： Methods and systems of managing memory addresses in a large capacity multi-level cell based flash memory device are described. According to one aspect, a flash memory device comprises a processing unit to manage logical-to-physical address correlation using an indexing scheme. The flash memory is partitioned into N sets. Each set includes a plurality of entries (i.e., blocks). N sets of partial logical entry number to physical block number and associated page usage information (hereinafter ‘PLTPPUI’) are stored in the reserved area of the MLC based flash memory. Only one the N sets is loaded to address correlation and page usage memory (ACPUM), which is a limited size random access memory (RAM). In one embodiment, static RAM (SRAM) is implemented for fast access time for the address correlation. LSA received together with the data transfer request dictates which one of the N sets of PLTPPUI is loaded into ACPUM.

摘要翻译： 描述了在大容量多级基于单元的闪存设备中管理存储器地址的方法和系统。 根据一个方面，一种闪存设备包括一个使用索引方案来管理逻辑到物理地址相关的处理单元。 闪存被分为N组。 每个集合包括多个条目（即，块）。 对于物理块号和相关联的页面使用信息（以下称为“PLTPPUI”）的N组部分逻辑条目号被存储在基于MLC的闪速存储器的保留区域中。 只有一个N集被加载以寻址相关和页面使用存储器（ACPUM），这是一个有限大小的随机存取存储器（RAM）。 在一个实施例中，静态RAM（SRAM）被实现用于地址相关的快速访问时间。 与数据传输请求一起接收的LSA指示将N组PLTPPUI中的哪一个加载到ACPUM中。

公开(公告)号：US20080256287A1

公开(公告)日：2008-10-16

申请号：US12025706

申请日：2008-02-04

申请人： Charles C. Lee ,  I-Kang Yu ,  David Nguyen ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

发明人： Charles C. Lee ,  I-Kang Yu ,  David Nguyen ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F12/0607 ,  G11C11/5621 ,  G11C16/0408 ,  G11C16/349 ,  G11C16/3495

摘要： Methods and systems of managing memory addresses in a large capacity multi-level cell based flash memory device are described. According to one aspect, a flash memory device comprises a processing unit to manage logical-to-physical address correlation using an indexing scheme. The flash memory is partitioned into N sets. Each set includes a plurality of entries (i.e., blocks). N sets of partial logical entry number to physical block number and associated page usage information (hereinafter ‘PLTPPUI’) are stored in the reserved area of the MLC based flash memory. Only one the N sets is loaded to address correlation and page usage memory (ACPUM), which is a limited size random access memory (RAM). In one embodiment, static RAM (SRAM) is implemented for fast access time for the address correlation. LSA received together with the data transfer request dictates which one of the N sets of PLTPPUI is loaded into ACPUM.

摘要翻译： 描述了在大容量多级基于单元的闪存设备中管理存储器地址的方法和系统。 根据一个方面，一种闪存设备包括一个使用索引方案来管理逻辑到物理地址相关的处理单元。 闪存被分为N组。 每个集合包括多个条目（即，块）。 对于物理块号和相关联的页面使用信息（以下称为“PLTPPUI”）的N组部分逻辑条目号被存储在基于MLC的闪速存储器的保留区域中。 只有一个N集被加载以寻址相关和页面使用存储器（ACPUM），这是一个有限大小的随机存取存储器（RAM）。 在一个实施例中，静态RAM（SRAM）被实现用于地址相关的快速访问时间。 与数据传输请求一起接收的LSA指示将N组PLTPPUI中的哪一个加载到ACPUM中。

公开(公告)号：US20110093653A1

公开(公告)日：2011-04-21

申请号：US12980591

申请日：2010-12-29

申请人： Charles C. Lee ,  I-Kang Yu ,  David Nguyen ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

发明人： Charles C. Lee ,  I-Kang Yu ,  David Nguyen ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

IPC分类号： G06F12/00

CPC分类号： H05K1/182 ,  G06F12/00 ,  H01R13/447 ,  H05K1/181 ,  H05K5/0278 ,  H05K2201/10189 ,  H05K2201/10446 ,  H05K2203/1572

摘要： Methods and systems of managing memory addresses in a large capacity multi-level cell based flash memory device are described. According to one aspect, a flash memory device comprises a processing unit to manage logical-to-physical address correlation using an indexing scheme. The flash memory is partitioned into N sets. Each set includes a plurality of entries (i.e., blocks). N sets of partial logical entry number to physical block number and associated page usage information (hereinafter ‘PLTPPUI’) are stored in the reserved area of the MLC based flash memory. Only one the N sets is loaded to address correlation and page usage memory (ACPUM), which is a limited size random access memory (RAM). In one embodiment, static RAM (SRAM) is implemented for fast access time for the address correlation. LSA received together with the data transfer request dictates which one of the N sets of PLTPPUI is loaded into ACPUM.

摘要翻译： 描述了在大容量多级基于单元的闪存设备中管理存储器地址的方法和系统。 根据一个方面，一种闪存设备包括一个使用索引方案来管理逻辑到物理地址相关的处理单元。 闪存被分为N组。 每个集合包括多个条目（即，块）。 对于物理块号和相关联的页面使用信息（以下称为“PLTPPUI”）的N组部分逻辑条目号被存储在基于MLC的闪速存储器的保留区域中。 只有一个N集被加载以寻址相关和页面使用存储器（ACPUM），这是一个有限大小的随机存取存储器（RAM）。 在一个实施例中，静态RAM（SRAM）被实现用于地址相关的快速访问时间。 与数据传输请求一起接收的LSA指示将N组PLTPPUI中的哪一个加载到ACPUM中。

公开(公告)号：US08297987B2

公开(公告)日：2012-10-30

申请号：US13211100

申请日：2011-08-16

申请人： David Nguyen ,  Nan Nan ,  Jim Chin-Nan Ni ,  Frank I-Kang Yu ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： David Nguyen ,  Nan Nan ,  Jim Chin-Nan Ni ,  Frank I-Kang Yu ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： H05K5/03

CPC分类号： G06K19/07732

摘要： An extended universal serial bus (USB) storage device is described herein. According to one embodiment, an extended USB storage device includes a printed circuit board assembly (PCBA) having a flash memory device and a flash controller mounted thereon, and an extended USB connector plug coupled to the PCBA for providing a USB compatible interface between an external device and the flash memory device and the flash controller, wherein the extended USB connector plug includes a first end used to couple to the external device and a second end coupled to the flash memory device and the flash controller. The extended USB connector plug includes multiple communication interfaces. Other methods and apparatuses are also described.

摘要翻译： 本文描述了扩展通用串行总线（USB）存储设备。 根据一个实施例，扩展的USB存储设备包括具有闪存设备和安装在其上的闪存控制器的印刷电路板组件（PCBA），以及耦合到PCBA的扩展USB连接器插头，用于在外部 设备和闪存设备和闪存控制器，其中扩展的USB连接器插头包括用于耦合到外部设备的第一端和耦合到闪存设备和闪存控制器的第二端。 扩展的USB连接器插头包括多个通信接口。 还描述了其它方法和装置。

公开(公告)号：US20110300724A1

公开(公告)日：2011-12-08

申请号：US13211100

申请日：2011-08-16

申请人： David Nguyen ,  Nan Nan ,  Jim Chin-Nan Ni ,  Frank I-Kang Yu ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： David Nguyen ,  Nan Nan ,  Jim Chin-Nan Ni ,  Frank I-Kang Yu ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： H05K5/03

CPC分类号： G06K19/07732

摘要： An extended universal serial bus (USB) storage device is described herein. According to one embodiment, an extended USB storage device includes a printed circuit board assembly (PCBA) having a flash memory device and a flash controller mounted thereon, and an extended USB connector plug coupled to the PCBA for providing a USB compatible interface between an external device and the flash memory device and the flash controller, wherein the extended USB connector plug includes a first end used to couple to the external device and a second end coupled to the flash memory device and the flash controller. The extended USB connector plug includes multiple communication interfaces. Other methods and apparatuses are also described.

摘要翻译： 本文描述了扩展通用串行总线（USB）存储设备。 根据一个实施例，扩展的USB存储设备包括具有闪存设备和安装在其上的闪存控制器的印刷电路板组件（PCBA），以及耦合到PCBA的扩展USB连接器插头，用于在外部 设备和闪存设备和闪存控制器，其中扩展的USB连接器插头包括用于耦合到外部设备的第一端和耦合到闪存设备和闪存控制器的第二端。 扩展的USB连接器插头包括多个通信接口。 还描述了其它方法和装置。

公开(公告)号：US20080276099A1

公开(公告)日：2008-11-06

申请号：US11929857

申请日：2007-10-30

申请人： David Nguyen ,  Nan Nan ,  I-Kang Yu ,  Jim Chin-Nan Ni ,  Ming-Shiang Shen

发明人： David Nguyen ,  Nan Nan ,  I-Kang Yu ,  Jim Chin-Nan Ni ,  Ming-Shiang Shen

IPC分类号： H04L9/32 ,  B23P11/00 ,  G06F1/16

CPC分类号： G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087 ,  Y10T29/4984

摘要： In one embodiment of the present invention a Universal Serial Bus (USB) flash drive with locking swivel cap includes a USB device, a swivel cap having a top swivel cap face and a bottom swivel cap face. The swivel cap is connectably attached to the USB device, four locking pins, two of which disposed on the top swivel cap face and two of which disposed on the bottom swivel cap face, two top locking grooves disposed on a top surface of the USB device, and two bottom locking grooves disposed on a bottom surface of the USB device, wherein the locking pins disposed on top swivel cap face coupled with the two top locking grooves and the locking pins disposed on the bottom swivel cap face couple with the two bottom locking grooves allowing the swivel cap to lock in fully open (180 degrees) and fully closed (0 degree). A USB connector is connected to the USB device to couple the USB flash drive to a host device. A fingerprint sensor area is disposed on the top side of the USB device, the fingerprint sensor scans fingerprints of a user of the portable flash drive with swivel cap and optional fingerprint verification capability, and allowing access to data stored on the portable flash drive with swivel cap and optional fingerprint verification capability.

摘要翻译： 在本发明的一个实施例中，具有锁定旋转盖的通用串行总线（USB）闪存驱动器包括USB设备，具有顶部旋转盖面和底部旋转盖面的旋转盖。 旋转盖可连接到USB设备，四个锁定销，其中两个设置在顶部旋转盖面上，其中两个设置在底部旋转盖面上，两个顶部锁定槽设置在USB设备的顶面上 以及设置在USB装置的底表面上的两个底部锁定槽，其中设置在顶部旋转盖面上的锁定销与两个顶部锁定槽结合，并且设置在底部旋转盖面上的锁定销与两个底部锁定 允许旋转盖锁定完全打开（180度）和完全关闭（0度）的槽。 USB连接器连接到USB设备，以将USB闪存驱动器耦合到主机设备。 指纹传感器区域设置在USB设备的顶侧，指纹传感器利用旋转盖扫描便携式闪存驱动器的用户的指纹和可选的指纹验证能力，并且允许使用旋转接头访问存储在便携式闪存驱动器上的数据 帽和可选指纹验证功能。

公开(公告)号：US20120309231A1

公开(公告)日：2012-12-06

申请号：US13585704

申请日：2012-08-14

申请人： David Nguyen ,  Nan Nan ,  Jim Chin-Nan Ni ,  Frank I-Kang Yu ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： David Nguyen ,  Nan Nan ,  Jim Chin-Nan Ni ,  Frank I-Kang Yu ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： H01R13/66

CPC分类号： H01R13/6658

摘要： A USB plug receptacle includes a connector substrate having a tongue portion having a first set of electrical contact pins disposed on a top surface of the tongue portion, a second set of a plurality of electrical pins disposed on a bottom surface of the tongue portion, a third set of electrical contact pins disposed on an opposite end of the tongue portion. The USB plug receptacle further includes a metal case made of a sheet of electrically conductive metal plate by blanking the sheet into a generally tubular shape to receive and enclose the connector substrate. When the connector substrate is inserted into the metal case, the third set of electrical contact pins are exposed outside of the metal case and the third set of electrical contact pins can be mounted on first and second sets of electrical contact pads of a printed circuit board assembly.

摘要翻译： USB插头插座包括具有舌部的连接器基底，舌部具有设置在舌部的顶表面上的第一组电接触针，设置在舌部的底表面上的多个电针的第二组， 设置在舌部相对端的第三组电接触针。 USB插头插座还包括由导电金属板片制成的金属外壳，通过将片材冲压成大致管状形状以接收和封闭连接器基板。 当连接器基板插入金属壳体中时，第三组电接触销被暴露在金属外壳的外部，并且第三组电接触销可以安装在印刷电路板的第一和第二组电接触焊盘上 部件。