公开(公告)号：US20210334012A1

公开(公告)日：2021-10-28

申请号：US17368461

申请日：2021-07-06

申请人： Advanced Micro Devices, Inc.

发明人： Andrew G. Kegel ,  Steven E. Raasch

IPC分类号： G06F3/06 ,  G06F16/907 ,  G06F12/0891

摘要： An electronic device includes a non-volatile memory and a memory controller. The memory controller selects, from the type-duration table, a duration for which data of a type of data is to be stored in a non-volatile memory. The memory controller writes the data to the non-volatile memory using values of one or more write parameters selected by the memory controller based on the duration. The memory controller sets an expected lifetime value in a record for the data in the expected lifetime table to indicate an expected lifetime of the data in the non-volatile memory.

公开(公告)号：US20200257623A1

公开(公告)日：2020-08-13

申请号：US16274146

申请日：2019-02-12

申请人： Advanced Micro Devices, Inc.

发明人： Jieming Yin ,  Yasuko Eckert ,  Matthew R. Poremba ,  Steven E. Raasch ,  Doug Hunt

IPC分类号： G06F12/0802

摘要： An electronic device handles memory access requests for data in a memory. The electronic device includes a memory controller for the memory, a last-level cache memory, a request generator, and a predictor. The predictor determines a likelihood that a cache memory access request for data at a given address will hit in the last-level cache memory. Based on the likelihood, the predictor determines: whether a memory access request is to be sent by the request generator to the memory controller for the data in parallel with the cache memory access request being resolved in the last-level cache memory, and, when the memory access request is to be sent, a type of memory access request that is to be sent. When the memory access request is to be sent, the predictor causes the request generator to send a memory request of the type to the memory controller.

公开(公告)号：US10719441B1

公开(公告)日：2020-07-21

申请号：US16274146

申请日：2019-02-12

申请人： Advanced Micro Devices, Inc.

发明人： Jieming Yin ,  Yasuko Eckert ,  Matthew R. Poremba ,  Steven E. Raasch ,  Doug Hunt

IPC分类号： G06F12/0802

摘要： An electronic device handles memory access requests for data in a memory. The electronic device includes a memory controller for the memory, a last-level cache memory, a request generator, and a predictor. The predictor determines a likelihood that a cache memory access request for data at a given address will hit in the last-level cache memory. Based on the likelihood, the predictor determines: whether a memory access request is to be sent by the request generator to the memory controller for the data in parallel with the cache memory access request being resolved in the last-level cache memory, and, when the memory access request is to be sent, a type of memory access request that is to be sent. When the memory access request is to be sent, the predictor causes the request generator to send a memory request of the type to the memory controller.

公开(公告)号：US20180121312A1

公开(公告)日：2018-05-03

申请号：US15338172

申请日：2016-10-28

申请人： Advanced Micro Devices, Inc.

发明人： Greg Sadowski ,  Steven E. Raasch ,  Shomit N. Das ,  Wayne Burleson

IPC分类号： G06F11/34 ,  G06F11/30

CPC分类号： G06F11/008 ,  G06F11/3058 ,  G06F11/3452 ,  Y02D10/34

摘要： A system and method for managing operating parameters within a system for optimal power and reliability are described. A device includes a functional unit and a corresponding reliability evaluator. The functional unit provides reliability information to one or more reliability monitors, which translate the information to reliability values. The reliability evaluator determines an overall reliability level for the system based on the reliability values. The reliability monitor compares the actual usage values and the expected usage values. When system has maintained a relatively high level of reliability for a given time interval, the reliability evaluator sends an indication to update operating parameters to reduce reliability of the system, which also reduces power consumption for the system.

公开(公告)号：US20220091980A1

公开(公告)日：2022-03-24

申请号：US17031706

申请日：2020-09-24

申请人： Advanced Micro Devices, Inc.

发明人： Onur Kayiran ,  Yasuko Eckert ,  Mark Henry Oskin ,  Gabriel H. Loh ,  Steven E. Raasch ,  Maxim V. Kazakov

IPC分类号： G06F12/0811 ,  G06F12/084 ,  G06F12/0877 ,  G06F13/16 ,  G06F11/30

摘要： A system and method for efficiently processing memory requests are described. A computing system includes multiple compute units, multiple caches of a memory hierarchy and a communication fabric. A compute unit generates a memory access request that misses in a higher level cache, which sends a miss request to a lower level shared cache. During servicing of the miss request, the lower level cache merges identification information of multiple memory access requests targeting a same cache line from multiple compute units into a merged memory access response. The lower level shared cache continues to insert information into the merged memory access response until the lower level shared cache is ready to issue the merged memory access response. An intermediate router in the communication fabric broadcasts the merged memory access response into multiple memory access responses to send to corresponding compute units.

公开(公告)号：US11061583B2

公开(公告)日：2021-07-13

申请号：US16525971

申请日：2019-07-30

申请人： Advanced Micro Devices, Inc.

发明人： Andrew G. Kegel ,  Steven E. Raasch

IPC分类号： G06F3/06 ,  G06F16/907 ,  G06F12/0891

摘要： An electronic device includes a non-volatile memory and a controller. The controller receives data to be written to the non-volatile memory and determines a type of the data. Based on the type of the data, the controller selects a given duration of the data from among multiple durations of the data in the non-volatile memory. The controller sets values of one or more parameters for writing the data to the non-volatile memory based on the given duration. The controller writes the data to the non-volatile memory using the values of the one or more write parameters.

公开(公告)号：US10318363B2

公开(公告)日：2019-06-11

申请号：US15338172

申请日：2016-10-28

申请人： Advanced Micro Devices, Inc.

发明人： Greg Sadowski ,  Steven E. Raasch ,  Shomit N. Das ,  Wayne Burleson

IPC分类号： G06F11/00 ,  G06F11/30 ,  G06F11/34

摘要： A system and method for managing operating parameters within a system for optimal power and reliability are described. A device includes a functional unit and a corresponding reliability evaluator. The functional unit provides reliability information to one or more reliability monitors, which translate the information to reliability values. The reliability evaluator determines an overall reliability level for the system based on the reliability values. The reliability monitor compares the actual usage values and the expected usage values. When system has maintained a relatively high level of reliability for a given time interval, the reliability evaluator sends an indication to update operating parameters to reduce reliability of the system, which also reduces power consumption for the system.

公开(公告)号：US20210034252A1

公开(公告)日：2021-02-04

申请号：US16525971

申请日：2019-07-30

申请人： Advanced Micro Devices, Inc.

发明人： Andrew G. Kegel ,  Steven E. Raasch

IPC分类号： G06F3/06 ,  G06F12/0891 ,  G06F16/907

摘要： An electronic device includes a non-volatile memory and a controller. The controller receives data to be written to the non-volatile memory and determines a type of the data. Based on the type of the data, the controller selects a given duration of the data from among multiple durations of the data in the non-volatile memory. The controller sets values of one or more parameters for writing the data to the non-volatile memory based on the given duration. The controller writes the data to the non-volatile memory using the values of the one or more write parameters.