Unified Key Schedule Engine
    1.
    发明申请
    Unified Key Schedule Engine 审中-公开
    统一密钥计划引擎

    公开(公告)号:US20150110267A1

    公开(公告)日:2015-04-23

    申请号:US14058007

    申请日:2013-10-18

    Inventor: Winthrop J. Wu

    CPC classification number: H04L9/0861 G09C1/00 H04L9/0631 H04L2209/24

    Abstract: A key generator may comprise a first set of word registers each configured to store at least one word of a prior key, a set of computational elements coupled with the first set of word registers, one or more path selection elements coupled with the set of computational elements, wherein the one or more path selection elements are configured to select as a selected computational pathway a first computational pathway including a first subset of computational elements when a mode selection signal indicates a first mode, and select as the selected computational pathway a second computational pathway including a second subset of computational elements when the mode selection signal indicates a second mode, and a second set of word registers coupled with the set of computational elements, wherein each of the second set of word registers is configured to store at least one word of a new key generated by the selected computational pathway.

    Abstract translation: 密钥生成器可以包括第一组字寄存器,每个字寄存器被配置为存储先前密钥的至少一个字,与第一组字寄存器耦合的一组计算元件,一个或多个路径选择元件,与该组计算 元件,其中所述一个或多个路径选择元件被配置为当模式选择信号指示第一模式时,选择包括计算元素的第一子集的第一计算路径作为所选择的计算路径,并且选择第二计算路径 路径,其包括当模式选择信号指示第二模式时的计算元件的第二子集,以及与所述一组计算元件耦合的第二组字寄存器,其中所述第二组字寄存器中的每一个被配置为存储至少一个字 由所选择的计算路径产生的新密钥。

    Efficient Deflate Decompression
    2.
    发明申请
    Efficient Deflate Decompression 有权
    有效的减压减压

    公开(公告)号:US20150109153A1

    公开(公告)日:2015-04-23

    申请号:US14057553

    申请日:2013-10-18

    CPC classification number: H03M7/30 H03M7/40 H03M7/4031 H03M7/425

    Abstract: A decompression engine may include an input configured to receive an input code comprises one or more bits from a bitstream of encoded data, a symbol decoder coupled with the input, where the symbol decoder is configured to calculate, based on the input code, a plurality of candidate addresses each corresponding to a code group. The symbol decoder may further include a group identifier module coupled with the symbol decoder, wherein the group identifier module is configured to identify one of the plurality of code groups corresponding to the input code, and a multiplexer coupled with the group identifier module, wherein the multiplexer is configured to select as a final address one of the plurality of candidate addresses corresponding to the identified code group.

    Abstract translation: 解压缩引擎可以包括被配置为从编码数据的比特流接收包括一个或多个比特的输入代码的输入,与输入相耦合的符号解码器,其中符号解码器被配置为基于输入的代码来计算多个 的候选地址,每个对应于代码组。 符号解码器还可以包括与符号解码器耦合的组标识符模块,其中组标识符模块被配置为识别对应于输入代码的多个代码组中的一个,以及与组标识符模块耦合的多路复用器,其中, 复用器被配置为选择对应于所识别的代码组的多个候选地址中的一个的最终地址。

    Architecture for Efficient Computation of Heterogeneous Workloads
    3.
    发明申请
    Architecture for Efficient Computation of Heterogeneous Workloads 有权
    高效计算异构工作负载的架构

    公开(公告)号:US20140344826A1

    公开(公告)日:2014-11-20

    申请号:US13894990

    申请日:2013-05-15

    Inventor: Winthrop J. Wu

    Abstract: Embodiments of a workload management architecture may include an input configured to receive workload data for a plurality of commands, a DMA block configured to divide the workload data for each command of the plurality of commands into a plurality of job packets, a job packet manager configured to assign one of the plurality of job packets to one of a plurality of fixed function engines (FFEs) coupled with the job packet manager, where each of the plurality of FFEs is configured to receive one or more of the plurality of job packets and generate one or more output packets based on the workload data in the received one or more job packets.

    Abstract translation: 工作负载管理架构的实施例可以包括被配置为接收多个命令的工作负载数据的输入,被配置为将多个命令的每个命令的工作负载数据划分成多个作业分组的DMA块,配置的作业分组管理器 将多个作业分组中的一个分配给与作业分组管理器耦合的多个固定功能引擎(FFE)中的一个,其中多个FFE中的每一个被配置为接收多个作业分组中的一个或多个并生成 基于所接收的一个或多个作业分组中的工作负载数据的一个或多个输出分组。

    Efficient processing of Huffman encoded data
    4.
    发明授权
    Efficient processing of Huffman encoded data 有权
    霍夫曼编码数据的高效处理

    公开(公告)号:US08976048B2

    公开(公告)日:2015-03-10

    申请号:US13895109

    申请日:2013-05-15

    Inventor: Winthrop J. Wu

    CPC classification number: H03M7/40 H03M7/30 H04N19/91

    Abstract: A method of decoding Huffman-encoded data may comprise receiving a symbol associated with the Huffman encoded data, selecting a target group for the symbol based on a bit length value associated with the symbol, associating the symbol with the target group, associating the symbol with a code, and incrementing a starting code for each of a plurality of groups associated with a starting code that is equal to or greater than the starting code of the target group.

    Abstract translation: 解码霍夫曼编码数据的方法可以包括:接收与霍夫曼编码数据相关联的符号,基于与该符号相关联的比特长度值来选择该符号的目标组,将该符号与该目标组相关联,将该符号与 代码,并且增加与等于或大于目标组的起始代码的起始代码相关联的多个组中的每个组的起始代码。

    DEBUG FUNCTIONALITY IN A SECURE COMPUTING ENVIRONMENT
    5.
    发明申请
    DEBUG FUNCTIONALITY IN A SECURE COMPUTING ENVIRONMENT 有权
    在安全的计算环境中调试功能

    公开(公告)号:US20140344919A1

    公开(公告)日:2014-11-20

    申请号:US13897688

    申请日:2013-05-20

    Inventor: Winthrop J. Wu

    CPC classification number: G06F21/74

    Abstract: A computer system includes a security processor, a first scan chain coupled to the security processor, a non-secure element, and a second scan chain coupled to the non-secure element. The computer system also includes one or more test access port controllers to control operation of the first and second scan chains, and further includes debug control logic, coupled to the one or more test access port controllers, to enable the one or more test access port controllers to activate debug functionality on the second scan chain but not the first scan chain in response to a predefined condition being satisfied.

    Abstract translation: 计算机系统包括安全处理器,耦合到安全处理器的第一扫描链,非安全元件以及耦合到非安全元件的第二扫描链。 计算机系统还包括一个或多个测试访问端口控制器以控制第一和第二扫描链的操作,并且还包括耦合到一个或多个测试访问端口控制器的调试控制逻辑,以使一个或多个测试访问端口 控制器来激活第二扫描链上的调试功能,但不响应于满足预定义条件的第一扫描链。

    Hardware Random Number Generator
    6.
    发明申请
    Hardware Random Number Generator 有权
    硬件随机数发生器

    公开(公告)号:US20140195576A1

    公开(公告)日:2014-07-10

    申请号:US13738899

    申请日:2013-01-10

    CPC classification number: G06F7/588

    Abstract: A random number generator may include an input configured to receive a plurality of entropy bits generated by an entropy source of a random number generator, wherein the random number generator is configured to generate a plurality of random numbers; and an entropy health monitor coupled with the input, wherein the entropy health monitor is configured to perform a corrective action based on the plurality of entropy bits.

    Abstract translation: 随机数生成器可以包括被配置为接收由随机数发生器的熵源生成的多个熵位的输入,其中所述随机数生成器被配置为生成多个随机数; 以及与所述输入端耦合的熵健康监视器,其中所述熵健康监视器被配置为基于所述多个熵位执行校正动作。

    Debug functionality in a secure computing environment
    7.
    发明授权
    Debug functionality in a secure computing environment 有权
    在安全的计算环境中调试功能

    公开(公告)号:US09224012B2

    公开(公告)日:2015-12-29

    申请号:US13897688

    申请日:2013-05-20

    Inventor: Winthrop J. Wu

    CPC classification number: G06F21/74

    Abstract: A computer system includes a security processor, a first scan chain coupled to the security processor, a non-secure element, and a second scan chain coupled to the non-secure element. The computer system also includes one or more test access port controllers to control operation of the first and second scan chains, and further includes debug control logic, coupled to the one or more test access port controllers, to enable the one or more test access port controllers to activate debug functionality on the second scan chain but not the first scan chain in response to a predefined condition being satisfied.

    Abstract translation: 计算机系统包括安全处理器,耦合到安全处理器的第一扫描链,非安全元件以及耦合到非安全元件的第二扫描链。 计算机系统还包括一个或多个测试访问端口控制器以控制第一和第二扫描链的操作,并且还包括耦合到一个或多个测试访问端口控制器的调试控制逻辑,以使一个或多个测试访问端口 控制器来激活第二扫描链上的调试功能,但不响应于满足预定义条件的第一扫描链。

    Architecture for efficient computation of heterogeneous workloads
    8.
    发明授权
    Architecture for efficient computation of heterogeneous workloads 有权
    用于高效计算异构工作负载的体系结构

    公开(公告)号:US09086916B2

    公开(公告)日:2015-07-21

    申请号:US13894990

    申请日:2013-05-15

    Inventor: Winthrop J. Wu

    Abstract: Embodiments of a workload management architecture may include an input configured to receive workload data for a plurality of commands, a DMA block configured to divide the workload data for each command of the plurality of commands into a plurality of job packets, a job packet manager configured to assign one of the plurality of job packets to one of a plurality of fixed function engines (FFEs) coupled with the job packet manager, where each of the plurality of FFEs is configured to receive one or more of the plurality of job packets and generate one or more output packets based on the workload data in the received one or more job packets.

    Abstract translation: 工作负载管理架构的实施例可以包括被配置为接收多个命令的工作负载数据的输入,被配置为将多个命令的每个命令的工作负载数据划分成多个作业分组的DMA块,配置的作业分组管理器 将多个作业分组中的一个分配给与作业分组管理器耦合的多个固定功能引擎(FFE)中的一个,其中多个FFE中的每一个被配置为接收多个作业分组中的一个或多个并生成 基于所接收的一个或多个作业分组中的工作负载数据的一个或多个输出分组。

    Efficient Processing of Huffman Encoded Data
    9.
    发明申请
    Efficient Processing of Huffman Encoded Data 有权
    霍夫曼编码数据的高效处理

    公开(公告)号:US20140340246A1

    公开(公告)日:2014-11-20

    申请号:US13895109

    申请日:2013-05-15

    Inventor: Winthrop J. Wu

    CPC classification number: H03M7/40 H03M7/30 H04N19/91

    Abstract: A method of decoding Huffman-encoded data may comprise receiving a symbol associated with the Huffman encoded data, selecting a target group for the symbol based on a bit length value associated with the symbol, associating the symbol with the target group, associating the symbol with a code, and incrementing a starting code for each of a plurality of groups associated with a starting code that is equal to or greater than the starting code of the target group.

    Abstract translation: 解码霍夫曼编码数据的方法可以包括:接收与霍夫曼编码数据相关联的符号,基于与该符号相关联的比特长度值来选择该符号的目标组,将该符号与该目标组相关联,将该符号与 代码,并且增加与等于或大于目标组的起始代码的起始代码相关联的多个组中的每个组的起始代码。

    Virtualized AES computational engine
    10.
    发明授权
    Virtualized AES computational engine 有权
    虚拟化AES计算引擎

    公开(公告)号:US09461815B2

    公开(公告)日:2016-10-04

    申请号:US14057722

    申请日:2013-10-18

    Inventor: Winthrop J. Wu

    CPC classification number: H04L9/0631 G09C1/00 H04L63/0457 H04L2209/12

    Abstract: A computational engine may include an input configured to receive a first data packet and a second data packet, a context memory configured to store one or more contexts, and a set of computational elements coupled with the input and coupled with the context memory. The set of computational elements may be configured to generate a first output data packet by executing a first sequence of cryptographic operations on the first data packet, and generate a second output data packet by executing a second sequence of cryptographic operations on the second data packet and on a selected context of the one of the one or more contexts. The selected context may be associated with the second packet of data, and the context may be stored in the context memory prior to the execution of the first sequence of cryptographic operations.

    Abstract translation: 计算引擎可以包括被配置为接收第一数据分组和第二数据分组的输入,被配置为存储一个或多个上下文的上下文存储器以及与所述输入耦合并与所述上下文存储器耦合的一组计算元件。 所述计算元件组可以被配置为通过对所述第一数据分组执行第一密码操作序列来生成第一输出数据分组,并且通过对所述第二数据分组执行第二加密操作序列来生成第二输出数据分组,以及 在所述一个或多个上下文中的一个的选择的上下文上。 所选择的上下文可以与第二数据分组相关联,并且上下文可以在执行第一密码操作序列之前被存储在上下文存储器中。

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