公开(公告)号：US20170012007A1

公开(公告)日：2017-01-12

申请号：US15271555

申请日：2016-09-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi-Sheng Chung ,  Kuo-Hsien Liao ,  Jin-Feng Yang ,  Chen-Yin Tai ,  Yung-I Yeh

IPC: H01L23/60 ,  H01L21/78 ,  H01L23/31 ,  H01L21/56 ,  H01L23/367 ,  H01L23/00

CPC classification number: H01L23/60 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/3675 ,  H01L24/17 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/19015 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/81

Abstract: The semiconductor package includes a substrate, a die, a first metal layer, a second metal layer and an optional seed layer. The package body at least partially encapsulates the die on the substrate. The seed layer is disposed on the package body and the first metal layer is disposed on the seed layer. The second metal layer is disposed on the first metal layer and the lateral surface of the substrate. The first metal layer and the second metal layer form an outer metal cap that provides thermal dissipation and electromagnetic interference (EMI) shielding.

Abstract translation: 半导体封装包括基板，管芯，第一金属层，第二金属层和可选的种子层。 封装体至少部分地将裸片封装在基板上。 种子层设置在包装体上，第一金属层设置在种子层上。 第二金属层设置在第一金属层和基板的侧表面上。 第一金属层和第二金属层形成外部金属帽，其提供散热和电磁干扰（EMI）屏蔽。

公开(公告)号：US09484313B2

公开(公告)日：2016-11-01

申请号：US13779249

申请日：2013-02-27

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi-Sheng Chung ,  Kuo-Hsien Liao ,  Jin-Feng Yang ,  Chen-Yin Tai ,  Yung-I Yeh

IPC: H01L23/552 ,  H01L23/60 ,  H01L23/00

CPC classification number: H01L23/60 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/3675 ,  H01L24/17 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/19015 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/81

Abstract: The semiconductor package includes a substrate, a die, a first metal layer, a second metal layer and an optional seed layer. The package body at least partially encapsulates the die on the substrate. The seed layer is disposed on the package body and the first metal layer is disposed on the seed layer. The second metal layer is disposed on the first metal layer and the lateral surface of the substrate. The first metal layer and the second metal layer form an outer metal cap that provides thermal dissipation and electromagnetic interference (EMI) shielding.

Abstract translation: 半导体封装包括基板，管芯，第一金属层，第二金属层和可选的种子层。 封装体至少部分地将裸片封装在基板上。 种子层设置在包装体上，第一金属层设置在种子层上。 第二金属层设置在第一金属层和基板的侧表面上。 第一金属层和第二金属层形成外部金属帽，其提供散热和电磁干扰（EMI）屏蔽。

公开(公告)号：US20140239464A1

公开(公告)日：2014-08-28

申请号：US13779249

申请日：2013-02-27

Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.

Inventor： Chi-Sheng Chung ,  Kuo-Hsien Liao ,  Jin-Feng Yang ,  Chen-Yin Tai ,  Yung-I Yeh

IPC: H01L23/60 ,  H01L21/78

CPC classification number: H01L23/60 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/3675 ,  H01L24/17 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/19015 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/81

Abstract: The semiconductor package includes a substrate, a die, a first metal layer, a second metal layer and an optional seed layer. The package body at least partially encapsulates the die on the substrate. The seed layer is disposed on the package body and the first metal layer is disposed on the seed layer. The second metal layer is disposed on the first metal layer and the lateral surface of the substrate. The first metal layer and the second metal layer form an outer metal cap that provides thermal dissipation and electromagnetic interference (EMI) shielding.

Abstract translation: 半导体封装包括基板，管芯，第一金属层，第二金属层和可选的种子层。 封装体至少部分地将裸片封装在基板上。 种子层设置在包装体上，第一金属层设置在种子层上。 第二金属层设置在第一金属层和基板的侧表面上。 第一金属层和第二金属层形成外部金属帽，其提供散热和电磁干扰（EMI）屏蔽。

公开(公告)号：US09984983B2

公开(公告)日：2018-05-29

申请号：US15271555

申请日：2016-09-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi-Sheng Chung ,  Kuo-Hsien Liao ,  Jin-Feng Yang ,  Chen-Yin Tai ,  Yung-I Yeh

IPC: H01L23/60 ,  H01L23/00 ,  H01L21/56 ,  H01L21/78 ,  H01L23/31 ,  H01L23/367

CPC classification number: H01L23/60 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/3675 ,  H01L24/17 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/19015 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/81

Abstract: The semiconductor package includes a substrate, a die, a first metal layer, a second metal layer and an optional seed layer. The package body at least partially encapsulates the die on the substrate. The seed layer is disposed on the package body and the first metal layer is disposed on the seed layer. The second metal layer is disposed on the first metal layer and the lateral surface of the substrate. The first metal layer and the second metal layer form an outer metal cap that provides thermal dissipation and electromagnetic interference (EMI) shielding.