公开(公告)号：US20180061727A1

公开(公告)日：2018-03-01

申请号：US15675612

申请日：2017-08-11

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Li-Hao LYU ,  Chieh-Ju TSAI ,  Yu-Kai LIN ,  Wei-Ming HSIEH ,  Yu-Pin TSAI ,  Man-Wen TSENG ,  Yu-Ting LU

IPC: H01L23/28 ,  H01L23/498 ,  H01L23/427 ,  H01L23/31

CPC classification number: H01L25/0657 ,  H01L21/561 ,  H01L23/28 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/427 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06586 ,  H01L2924/1433 ,  H01L2924/3511 ,  H01L2224/83

Abstract: A semiconductor device package comprises an adhesive layer, a die on the adhesive layer, a first encapsulation layer encapsulating the die and the adhesive layer, and a second encapsulation layer adjacent to the first encapsulation layer and the adhesive layer. The second encapsulation layer has a first surface and a second surface different from the first surface. A contact angle of the first surface of the second encapsulation layer is different from a contact angle of the second surface of the second encapsulation layer.

公开(公告)号：US20250070075A1

公开(公告)日：2025-02-27

申请号：US18237880

申请日：2023-08-24

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi-Yang CHIANG ,  Man-Wen TSENG ,  Chien-Ching CHEN

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/538

Abstract: A package structure includes a wiring structure, a first electronic device and a reinforcement structure. The first electronic device is disposed over the top surface of the wiring structure, and has a bottom surface facing the top surface of the wiring structure. The first electronic device includes a plurality of first wires. The reinforcement structure is disposed over the top surface of the wiring structure, and includes a plurality of second wires directly contacting the plurality of first wires to reduce a variation of an elevation of the bottom surface of the first electronic device with respect to the top surface of the wiring structure.

公开(公告)号：US20180061813A1

公开(公告)日：2018-03-01

申请号：US15675617

申请日：2017-08-11

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wei-Ming HSIEH ,  Yu-Pin TSAI ,  Man-Wen TSENG ,  Li-Hao LYU

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L25/0657 ,  H01L21/561 ,  H01L23/28 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/427 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06586 ,  H01L2924/1433 ,  H01L2924/3511 ,  H01L2224/83

Abstract: A semiconductor device package including a first encapsulation layer, a redistribution layer disposed on the first encapsulation layer, a first die disposed on the redistribution layer, a second encapsulation layer covering the first die and the redistribution layer, and an electrical connection terminal electrically connected to the redistribution layer. The first encapsulation layer has a first surface and a second surface different from the first surface. The first encapsulation layer surrounds a portion of the electrical connection terminal and exposes the electrical connection terminal.

公开(公告)号：US20190206843A1

公开(公告)日：2019-07-04

申请号：US16297470

申请日：2019-03-08

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Li-Hao LYU ,  Chieh-Ju TSAI ,  Yu-Kai LIN ,  Wei-Ming HSIEH ,  Yu-Pin TSAI ,  Man-Wen TSENG ,  Yu-Ting LU

IPC: H01L25/065 ,  H01L23/538 ,  H01L23/31 ,  H01L23/427 ,  H01L23/498 ,  H01L23/00 ,  H01L21/56 ,  H01L23/28

CPC classification number: H01L25/0657 ,  H01L21/561 ,  H01L23/28 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/427 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06586 ,  H01L2924/1433 ,  H01L2924/3511 ,  H01L2224/83

Abstract: A method for manufacturing a semiconductor device package includes: (1) providing a first encapsulation layer; (2) disposing an adhesive layer on the first encapsulation layer; (3) disposing a first die on the adhesive layer; and (4) forming a second encapsulation layer covering the first die, the adhesive layer, and the first encapsulation layer.