公开(公告)号：US07725847B2

公开(公告)日：2010-05-25

申请号：US10586908

申请日：2004-11-01

申请人： Akihiro Goto ,  Hironori Matsushima ,  Hiroshige Ogawa ,  Yoshio Matsuda

发明人： Akihiro Goto ,  Hironori Matsushima ,  Hiroshige Ogawa ,  Yoshio Matsuda

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/49052 ,  H01L2224/49171 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A design support apparatus supports wiring design for bond wires that connect a semiconductor chip and an interposer. The design support apparatus includes a creating unit that creates simulated design data simulating occurrence of fluctuation in an arrangement position of a semiconductor chip on an interposer and occurrence of fluctuation in bond wire connection terminal positions of the interposer, and an analyzing unit that analyzes, based on the simulated design data, deficiencies in manufacturing of semiconductor devices due to the fluctuation in the arrangement position of the semiconductor chip on the interposer and the fluctuation in the bond wire connection terminal positions of the interposer.

摘要翻译： 设计支持设备支持连接半导体芯片和插入器的接合线的布线设计。 设计支持装置包括：创建单元，其创建模拟设计数据，模拟在插入器上的半导体芯片的布置位置的波动的发生以及插入器的接合线连接端子位置的波动的发生;以及分析单元， 关于模拟设计数据，由于插入件上的半导体芯片的布置位置的波动以及插入器的接合线连接端子位置的波动引起的半导体器件的制造缺陷。

公开(公告)号：US20080250363A1

公开(公告)日：2008-10-09

申请号：US10586908

申请日：2004-11-01

申请人： Akihiro Goto ,  Hironori Matsushima ,  Hiroshige Ogawa ,  Yoshio Matsuda

发明人： Akihiro Goto ,  Hironori Matsushima ,  Hiroshige Ogawa ,  Yoshio Matsuda

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/49052 ,  H01L2224/49171 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A design support apparatus supports wiring design for bond wires that connect a semiconductor chip and an interposer. The design support apparatus includes a creating unit that creates simulated design data simulating occurrence of fluctuation in an arrangement position of a semiconductor chip on an interposer and occurrence of fluctuation in bond wire connection terminal positions of the interposer, and an analyzing unit that analyzes, based on the simulated design data, deficiencies in manufacturing of semiconductor devices due to the fluctuation in the arrangement position of the semiconductor chip on the interposer and the fluctuation in the bond wire connection terminal positions of the interposer.

摘要翻译： 设计支持设备支持连接半导体芯片和插入器的接合线的布线设计。 设计支持装置包括：创建单元，其创建模拟设计数据，模拟在插入器上的半导体芯片的布置位置的波动的发生以及插入器的接合线连接端子位置的波动的发生;以及分析单元， 关于模拟设计数据，由于插入件上的半导体芯片的布置位置的波动以及插入器的接合线连接端子位置的波动引起的半导体器件的制造缺陷。