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    System and method for self-diagnosis in a controller
    9.
    发明申请
    System and method for self-diagnosis in a controller 审中-公开
    控制器中自诊断的系统和方法

    公开(公告)号：US20070055480A1

    公开(公告)日：2007-03-08

    申请号：US11514273

    申请日：2006-09-01

    申请人： Hiromichi Endoh ,  Tsutomu Yamada ,  Naoya Mashiko ,  Takashi Umehara

    发明人： Hiromichi Endoh ,  Tsutomu Yamada ,  Naoya Mashiko ,  Takashi Umehara

    IPC分类号： G21C17/00

    CPC分类号： G06F11/27

    摘要： A self-diagnosis system of a processor capable of realizing a sufficiently high processing ability for control tasks is provided without deteriorating reliability of safety controls even in complex diagnostic techniques. The self-diagnosis system is equipped with a diagnostic target area allocator for allocating a non-active area within a memory as a diagnosis-ready area, which is not used in a control task under execution by a main processor in an independent manner from the main processor; and a diagnostic executor for executing a diagnosis based upon a predetermined sequence in an independent manner from the main processor. In the self-diagnosis system, a diagnostic target area segmented from the diagnosis-ready area is selected, and a diagnosis of the selected diagnostic target area is carried out in each of diagnostic cycles by the diagnostic executor.

    摘要翻译： 提供了能够实现足够高的控制任务处理能力的处理器的自我诊断系统，而不会恶化安全控制的可靠性，即使在复杂的诊断技术中。 自诊断系统配备有用于将存储器内的非有效区域分配为诊断就绪区域的诊断目标区域分配器，其不被主处理器执行的控制任务中以独立的方式从 主处理器 以及诊断执行器，用于基于来自主处理器的独立方式基于预定顺序执行诊断。 在自诊断系统中，选择从诊断就绪区域分割的诊断对象区域，并且通过诊断执行器在每个诊断周期中进行所选择的诊断对象区域的诊断。

    Computer system
    10.
    发明授权
    Computer system 失效
    电脑系统

    公开(公告)号：US07716405B2

    公开(公告)日：2010-05-11

    申请号：US11599383

    申请日：2006-11-15

    申请人： Tsutomu Yamada ,  Hiromichi Endoh ,  Noritaka Matsumoto ,  Satoru Funaki ,  Tatsuya Maruyama ,  Atsushi Ito ,  Fumiyuki Tamura ,  Norihisa Yanagihara ,  Makiko Naemura

    发明人： Tsutomu Yamada ,  Hiromichi Endoh ,  Noritaka Matsumoto ,  Satoru Funaki ,  Tatsuya Maruyama ,  Atsushi Ito ,  Fumiyuki Tamura ,  Norihisa Yanagihara ,  Makiko Naemura

    IPC分类号： G06F13/36

    CPC分类号： G06F13/37

    摘要： A computer system, being a stack bus system in which a plurality of computer modules are stacked and connected to one another and being capable of automatically matching and allocating bus resources such as clocks and interrupts, is provided. In the computer system including one system module and n peripheral modules, each peripheral module includes an interrupt selector, a clock selector, an arbitration signal selector, a resource decision unit, and a position identification unit. The position identification unit cooperates with a position configuration unit present in the system module to identify a position of the module, which includes the position identification unit, in the computer system, and autonomously decides bus resources used by the module. By allowing the interrupt selector, the clock selector, and the arbitration signal selector to select and use the decided bus resources, each peripheral module can match and configure the bus resources in the computer system.

    摘要翻译： 一种作为堆叠总线系统的计算机系统，其中多个计算机模块彼此堆叠并彼此连接并且能够自动匹配和分配诸如时钟和中断的总线资源。 在包括一个系统模块和n个外围模块的计算机系统中，每个外围模块包括中断选择器，时钟选择器，仲裁信号选择器，资源判定单元和位置识别单元。 所述位置识别单元与存在于所述系统模块中的位置配置单元配合，以在所述计算机系统中识别包括所述位置识别单元的模块的位置，并且自主地决定所述模块使用的总线资源。 通过允许中断选择器，时钟选择器和仲裁信号选择器来选择和使用所决定的总线资源，每个外围模块可以匹配和配置计算机系统中的总线资源。