公开(公告)号：US08161362B2

公开(公告)日：2012-04-17

申请号：US11447724

申请日：2006-06-07

申请人： Akira Bando ,  Shin Kokura ,  Takashi Umehara ,  Masamitsu Kobayashi ,  Hisao Nagayama ,  Naoya Mashiko ,  Masakazu Ishikawa ,  Masahiro Shiraishi ,  Akihiro Onozuka ,  Hiromichi Endoh ,  Tsutomu Yamada ,  Satoru Funaki

发明人： Akira Bando ,  Shin Kokura ,  Takashi Umehara ,  Masamitsu Kobayashi ,  Hisao Nagayama ,  Naoya Mashiko ,  Masakazu Ishikawa ,  Masahiro Shiraishi ,  Akihiro Onozuka ,  Hiromichi Endoh ,  Tsutomu Yamada ,  Satoru Funaki

IPC分类号： G06F11/00 ,  G06F7/02

CPC分类号： G06F9/3851 ,  G06F9/30189 ,  G06F9/3885 ,  G06F11/1641 ,  G06F11/165 ,  G06F11/1683 ,  G06F11/1687 ,  G06F11/1695 ,  G06F2201/845

摘要： Processed results are received when processors make compatible computations on data of a common object. A computation command signal is generated and fed to the processors in response to a start signal from any one of the processors so that the processors can make computations with different operation timings. Then, the results of the computations made by the processors are compared with each other. Thus, apparatus capable of small size, high performance and safety at the same time can be achieved by the above construction using the processors.

摘要翻译： 当处理器对公共对象的数据进行兼容计算时，接收到处理的结果。 响应于来自任一个处理器的启动信号，生成计算命令信号并将其馈送到处理器，使得处理器可以用不同的操作定时进行计算。 然后，将处理器进行的计算的结果相互比较。 因此，可以通过使用处理器的上述结构来实现同时具有小尺寸，高性能和安全性的装置。

公开(公告)号：US20060282702A1

公开(公告)日：2006-12-14

申请号：US11447724

申请日：2006-06-07

申请人： Akira Bando ,  Shin Kokura ,  Takashi Umehara ,  Masamitsu Kobayashi ,  Hisao Nagayama ,  Naoya Mashiko ,  Masahiro Shiraishi ,  Masakazu Ishikawa ,  Akihiro Onozuka ,  Hiromichi Endoh ,  Tsutomu Yamada ,  Satoru Funaki

发明人： Akira Bando ,  Shin Kokura ,  Takashi Umehara ,  Masamitsu Kobayashi ,  Hisao Nagayama ,  Naoya Mashiko ,  Masahiro Shiraishi ,  Masakazu Ishikawa ,  Akihiro Onozuka ,  Hiromichi Endoh ,  Tsutomu Yamada ,  Satoru Funaki

IPC分类号： G05B9/02 ,  G06F11/00

CPC分类号： G06F9/3851 ,  G06F9/30189 ,  G06F9/3885 ,  G06F11/1641 ,  G06F11/165 ,  G06F11/1683 ,  G06F11/1687 ,  G06F11/1695 ,  G06F2201/845

摘要： Processed results are received when processors make compatible computations on data of a common object. A computation command signal is generated and fed to the processors in response to a start signal from any one of the processors so that the processors can make computations with different operation timings. Then, the results of the computations made by the processors are compared with each other. Thus, apparatus capable of small size, high performance and safety at the same time can be achieved by the above construction using the processors.

摘要翻译： 当处理器对公共对象的数据进行兼容计算时，接收到处理的结果。 响应于来自任一个处理器的启动信号，生成计算命令信号并将其馈送到处理器，使得处理器可以利用不同的操作定时进行计算。 然后，将处理器进行的计算的结果相互比较。 因此，可以通过使用处理器的上述结构来实现同时具有小尺寸，高性能和安全性的装置。

公开(公告)号：US20110214125A1

公开(公告)日：2011-09-01

申请号：US13105041

申请日：2011-05-11

申请人： Akira Bando ,  Shin Kokura ,  Takashi Umehara ,  Masamitsu Kobayashi ,  Hisao Nagayama ,  Naoya Mashiko ,  Masakazu Ishikawa ,  Masahiro Shiraishi ,  Akihiro Onozuka ,  Hiromichi Endoh ,  Tsutomu Yamada ,  Satoru Funaki

发明人： Akira Bando ,  Shin Kokura ,  Takashi Umehara ,  Masamitsu Kobayashi ,  Hisao Nagayama ,  Naoya Mashiko ,  Masakazu Ishikawa ,  Masahiro Shiraishi ,  Akihiro Onozuka ,  Hiromichi Endoh ,  Tsutomu Yamada ,  Satoru Funaki

IPC分类号： G06F9/46

CPC分类号： G06F9/3851 ,  G06F9/30189 ,  G06F9/3885 ,  G06F11/1641 ,  G06F11/165 ,  G06F11/1683 ,  G06F11/1687 ,  G06F11/1695 ,  G06F2201/845

摘要： An input/output control apparatus including: a unit that controls input/output of data relating to a computation of a plurality of processors in response to an access request from a second input/output unit and an access request from a first input/output unit which requires higher reliability than said second input/output unit, and orders at least one of a plurality of processors to perform a computation relating to the access request from said first input/output unit away from the computation relating to the access request from said second input/output unit in case of that said first input/output unit issued an access request, so that a same computation is made by said plurality of processors; a unit that compares the results of said computations relative to the access request from said first input/output unit provided from said plurality of processors; and a unit that allows the data associated with said computations of said processors to be output on the basis of said compared results.

摘要翻译： 一种输入/输出控制装置，包括：响应于来自第二输入/输出单元的访问请求和来自第一输入/输出单元的访问请求来控制与多个处理器的计算有关的数据的输入/输出的单元 其要求比所述第二输入/输出单元更高的可靠性，并且命令多个处理器中的至少一个处理器执行与来自所述第一输入/输出单元的访问请求相关的计算，远离与所述第二输入/输出单元的访问请求有关的计算 在所述第一输入/输出单元发出访问请求的情况下，输入/输出单元，使得所述多个处理器进行相同的计算; 从所述多个处理器提供的所述第一输入/输出单元中比较所述计算结果与所述访问请求的单元; 以及允许基于所述比较结果输出与所述处理器的所述计算相关联的数据的单元。

公开(公告)号：US07555627B2

公开(公告)日：2009-06-30

申请号：US11477468

申请日：2006-06-30

申请人： Naoya Mashiko ,  Takashi Umehara ,  Masamitsu Kobayashi ,  Hiromichi Endoh ,  Akihiro Onozuka ,  Akira Bando ,  Shin Kokura ,  Hisao Nagayama ,  Masakazu Ishikawa ,  Satoru Funaki ,  Masahiro Shiraishi

发明人： Naoya Mashiko ,  Takashi Umehara ,  Masamitsu Kobayashi ,  Hiromichi Endoh ,  Akihiro Onozuka ,  Akira Bando ,  Shin Kokura ,  Hisao Nagayama ,  Masakazu Ishikawa ,  Satoru Funaki ,  Masahiro Shiraishi

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28

CPC分类号： G06F13/122 ,  Y02P90/14

摘要： Input-output devices are prevented from conducting false output due to faulty operation by providing an input-output control apparatus configured to store input-output values to be used by a processor to conduct arithmetic operation in a mode having a relatively high safety requirement, in a first storage area, store input-output values to be used by the processor to conduct arithmetic operation in a mode having a relatively low safety requirement, in a second storage area, and restrict copying to the first storage area, copying from the first storage area, copying to the second storage area, or copying from the second storage area according to the mode concerning the safety requirement.

摘要翻译： 通过提供输入输出控制装置，通过提供输入输出控制装置来防止输入输出装置由于处理器使用的输入输出值，以便以具有较高安全性要求的模式进行算术运算 第一存储区域，存储由处理器在具有相对较低安全性要求的模式下进行算术运算的输入输出值，并将其限制在第一存储区域中，并将复制从第一存储区域 区域，复制到第二存储区域，或者根据关于安全性要求的模式从第二存储区域进行复制。

公开(公告)号：US20070006025A1

公开(公告)日：2007-01-04

申请号：US11477440

申请日：2006-06-30

申请人： Akihiro Onozuka ,  Masakazu Ishikawa ,  Masamitsu Kobayashi ,  Takashi Umehara ,  Shin Kokura ,  Hiromichi Endoh ,  Satoru Funaki ,  Hisao Nagayama ,  Masahiro Shiraishi ,  Akira Bando ,  Eiji Kobayashi ,  Yasuyuki Furuta ,  Naoya Mashiko

发明人： Akihiro Onozuka ,  Masakazu Ishikawa ,  Masamitsu Kobayashi ,  Takashi Umehara ,  Shin Kokura ,  Hiromichi Endoh ,  Satoru Funaki ,  Hisao Nagayama ,  Masahiro Shiraishi ,  Akira Bando ,  Eiji Kobayashi ,  Yasuyuki Furuta ,  Naoya Mashiko

IPC分类号： G06F11/00

CPC分类号： H04L1/0046

摘要： The system has, provided in a sending device, a generator generating transmission data including data, a data error detection code generated from the data and a safety flag indicating a degree of reliability, and transmission data; has, provided in a receiving device, a plurality of components of extracting transmission data, a safety flag, and a data error detection code from a received frame, and detecting a data error, a comparator comparing the matching of a plurality of received frames, and a selector selecting one received frame, from the frame error detection result, the safety flag, the data error detection result, and the matching comparison result; and determines the validity of transmitted data by the detection corresponding to the degree of reliability set with the safety flag.

摘要翻译： 该系统在发送装置中具有生成包括数据的发送数据的发生器，从数据生成的数据错误检测码和表示可靠度的安全标志，以及发送数据; 在接收装置中具有从接收到的帧中提取发送数据，安全标志和数据错误检测码的多个组件，并且检测数据错误，比较多个接收帧的匹配的比较器， 以及从帧错误检测结果，安全标志，数据错误检测结果和匹配比较结果中选择一个接收帧的选择器; 并通过与利用安全标志设定的可靠度相对应的检测来确定发送数据的有效性。

公开(公告)号：US20110022936A1

公开(公告)日：2011-01-27

申请号：US12900988

申请日：2010-10-08

申请人： Akihiro ONOZUKA ,  Masakazu Ishikawa ,  Masamitsu Kobayashi ,  Takashi Umehara ,  Shin Kokura ,  Hiromichi Endoh ,  Satoru Funaki ,  Hisao Nagayama ,  Masahiro Shiraishi ,  Akira Bando ,  Eiji Kobayashi ,  Yasuyuki Furuta ,  Naoya Mashiko

发明人： Akihiro ONOZUKA ,  Masakazu Ishikawa ,  Masamitsu Kobayashi ,  Takashi Umehara ,  Shin Kokura ,  Hiromichi Endoh ,  Satoru Funaki ,  Hisao Nagayama ,  Masahiro Shiraishi ,  Akira Bando ,  Eiji Kobayashi ,  Yasuyuki Furuta ,  Naoya Mashiko

IPC分类号： H03M13/09 ,  G06F11/10

CPC分类号： H04L1/0046

摘要： A receiving device including: a receiver receiving two frames, each including substantially same data attached thereto with a data error detection code, a frame error detection code, and safety flag information indicating a safety function or not, respectively; a first detector connected to the receiver for performing error detection of the frames by use of the frame error detection code, respectively; a second detector connected to the receiver for performing error detection of the data by use of the data error detection code, respectively; and a Direct Memory Access Controller (DMAC) connected to the first and second detectors for outputting one among the data included in the two frames under a condition of the safety function in the two frames when no error is detected in the frame and data error detections.

摘要翻译： 一种接收装置，包括：接收器，接收两个帧，每个帧分别包括与数据错误检测码相关的基本相同的数据，帧错误检测码和表示安全功能的安全标志信息; 连接到接收机的第一检测器，分别通过使用帧错误检测码来进行帧的错误检测; 连接到所述接收器的第二检测器，用于分别通过使用所述数据检错码执行所述数据的错误检测; 以及连接到第一和第二检测器的直接存储器访问控制器（DMAC），用于在帧中没有检测到错误的两帧中的安全功能的条件下输出包括在两个帧中的数据之一，并且数据错误检测 。

公开(公告)号：US20070239916A1

公开(公告)日：2007-10-11

申请号：US11477468

申请日：2006-06-30

申请人： Naoya Mashiko ,  Takashi Umehara ,  Masamitsu Kobayashi ,  Hiromichi Endoh ,  Akihiro Onozuka ,  Akira Bando ,  Shin Kokura ,  Hisao Nagayama ,  Masakazu Ishikawa ,  Satoru Funaki ,  Masahiro Shiraishi

发明人： Naoya Mashiko ,  Takashi Umehara ,  Masamitsu Kobayashi ,  Hiromichi Endoh ,  Akihiro Onozuka ,  Akira Bando ,  Shin Kokura ,  Hisao Nagayama ,  Masakazu Ishikawa ,  Satoru Funaki ,  Masahiro Shiraishi

IPC分类号： G06F12/14

CPC分类号： G06F13/122 ,  Y02P90/14

摘要： Input-output devices are prevented from conducting false output due to faulty operation by providing an input-output control apparatus configured to store input-output values to be used by a processor to conduct arithmetic operation in a mode having a relatively high safety requirement, in a first storage area, store input-output values to be used by the processor to conduct arithmetic operation in a mode having a relatively low safety requirement, in a second storage area, and restrict copying to the first storage area, copying from the first storage area, copying to the second storage area, or copying from the second storage area according to the mode concerning the safety requirement.

摘要翻译： 通过提供输入输出控制装置，通过提供输入输出控制装置来防止输入输出装置由于处理器使用的输入输出值，以便以具有较高安全性要求的模式进行算术运算 第一存储区域，存储由处理器在具有相对较低安全性要求的模式下进行算术运算的输入输出值，并将其限制在第一存储区域中，并将复制从第一存储区域 区域，复制到第二存储区域，或者根据关于安全性要求的模式从第二存储区域进行复制。

公开(公告)号：US08209594B2

公开(公告)日：2012-06-26

申请号：US12900988

申请日：2010-10-08

申请人： Akihiro Onozuka ,  Masakazu Ishikawa ,  Masamitsu Kobayashi ,  Takashi Umehara ,  Shin Kokura ,  Hiromichi Endoh ,  Satoru Funaki ,  Hisao Nagayama ,  Masahiro Shiraishi ,  Akira Bando ,  Eiji Kobayashi ,  Yasuyuki Furuta ,  Naoya Mashiko

发明人： Akihiro Onozuka ,  Masakazu Ishikawa ,  Masamitsu Kobayashi ,  Takashi Umehara ,  Shin Kokura ,  Hiromichi Endoh ,  Satoru Funaki ,  Hisao Nagayama ,  Masahiro Shiraishi ,  Akira Bando ,  Eiji Kobayashi ,  Yasuyuki Furuta ,  Naoya Mashiko

IPC分类号： G06F11/10 ,  H03M13/00

CPC分类号： H04L1/0046

摘要： A receiving device including: a receiver receiving two frames, each including substantially same data attached thereto with a data error detection code, a frame error detection code, and safety flag information indicating a safety function or not, respectively; a first detector connected to the receiver for performing error detection of the frames by use of the frame error detection code, respectively; a second detector connected to the receiver for performing error detection of the data by use of the data error detection code, respectively; and a Direct Memory Access Controller (DMAC) connected to the first and second detectors for outputting one among the data included in the two frames under a condition of the safety function in the two frames when no error is detected in the frame and data error detections.

摘要翻译： 一种接收装置，包括：接收器，接收两个帧，每个帧分别包括与数据错误检测码相关的基本相同的数据，帧错误检测码和表示安全功能的安全标志信息; 连接到接收机的第一检测器，分别通过使用帧错误检测码来进行帧的错误检测; 连接到所述接收器的第二检测器，用于分别通过使用所述数据检错码执行所述数据的错误检测; 以及连接到第一和第二检测器的直接存储器访问控制器（DMAC），用于在帧中没有检测到错误的两帧中的安全功能的条件下输出包括在两个帧中的数据之一，并且数据错误检测 。