公开(公告)号：US20190312027A1

公开(公告)日：2019-10-10

申请号：US15405167

申请日：2017-01-12

Applicant: Akoustis, Inc.

Inventor： Shawn R. GIBB ,  David AICHELE ,  Ramakrishna VETURY ,  Mark D. BOOMGARDEN ,  Jeffrey B. SHEALY

IPC: H01L27/06 ,  H01L21/02 ,  H01L29/20 ,  H03H3/08 ,  H03H9/46 ,  H03F3/19 ,  H04B1/44 ,  H03F3/21 ,  H01L29/417 ,  H01L29/80 ,  H01L21/8252 ,  H01L27/20

Abstract: A method of manufacture and structure for a monolithic single chip single crystal device. The method can include forming a first single crystal epitaxial layer overlying the substrate and forming one or more second single crystal epitaxial layers overlying the first single crystal epitaxial layer. The first single crystal epitaxial layer and the one or more second single crystal epitaxial layers can be processed to form one or more active or passive device components. Through this process, the resulting device includes a monolithic epitaxial stack integrating multiple circuit functions.

公开(公告)号：US20210202473A1

公开(公告)日：2021-07-01

申请号：US17180174

申请日：2021-02-19

Applicant: Akoustis, Inc.

Inventor： Shawn R. GIBB ,  David AICHELE ,  Ramakrishna VETURY ,  Mark D. BOOMGARDEN ,  Jeffrey B. SHEALY

IPC: H01L27/06 ,  H01L21/02 ,  H01L21/8252 ,  H01L27/20 ,  H01L29/20 ,  H01L29/417 ,  H01L29/80 ,  H03F3/19 ,  H03F3/21 ,  H03H3/08 ,  H03H9/46 ,  H04B1/44

Abstract: A method of manufacture and structure for a monolithic single chip single crystal device. The method can include forming a first single crystal epitaxial layer overlying the substrate and forming one or more second single crystal epitaxial layers overlying the first single crystal epitaxial layer. The first single crystal epitaxial layer and the one or more second single crystal epitaxial layers can be processed to form one or more active or passive device components. Through this process, the resulting device includes a monolithic epitaxial stack integrating multiple circuit functions.

公开(公告)号：US20190068164A1

公开(公告)日：2019-02-28

申请号：US16175650

申请日：2018-10-30

Applicant: Akoustis, Inc.

Inventor： Rohan W. HOULDEN ,  Jeffrey B. SHEALY ,  Shawn R. GIBB ,  David AICHELE

IPC: H03H9/56 ,  H03H9/17 ,  H03H9/02 ,  H03H3/02 ,  H01L29/20

Abstract: An RF circuit device using modified lattice, lattice, and ladder circuit topologies. The devices can include four resonator devices and four shunt resonator devices. In the ladder topology, the resonator devices are connected in series from an input port to an output port while shunt resonator devices are coupled the nodes between the resonator devices. In the lattice topology, a top and a bottom serial configurations each includes a pair of resonator devices that are coupled to differential input and output ports. A pair of shunt resonators is cross-coupled between each pair of a top serial configuration resonator and a bottom serial configuration resonator. The modified lattice topology adds baluns or inductor devices between top and bottom nodes of the top and bottom serial configurations of the lattice configuration. These topologies may be applied using single crystal or polycrystalline bulk acoustic wave (BAW) resonators.

公开(公告)号：US20180309422A1

公开(公告)日：2018-10-25

申请号：US16019267

申请日：2018-06-26

Applicant: Akoustis, Inc.

Inventor： Jeffrey B. SHEALY ,  Michael HODGE ,  Rohan W. HOULDEN ,  Shawn R. GIBB ,  Mary WINTERS ,  Ramakrishna VETURY ,  David AICHELE

IPC: H03H3/02 ,  H03H9/00 ,  H03H9/02 ,  H03H9/05 ,  H03H9/10 ,  H03H9/205 ,  H03H9/54 ,  H03H9/56 ,  H01L41/187 ,  H01L41/047 ,  H01L27/20 ,  H01L41/29 ,  H01L41/332

CPC classification number: H03H3/02 ,  H01L27/20 ,  H01L41/0475 ,  H01L41/0477 ,  H01L41/187 ,  H01L41/29 ,  H01L41/332 ,  H03H9/0095 ,  H03H9/02031 ,  H03H9/02118 ,  H03H9/0523 ,  H03H9/0533 ,  H03H9/1014 ,  H03H9/105 ,  H03H9/173 ,  H03H9/175 ,  H03H9/205 ,  H03H9/542 ,  H03H9/562 ,  H03H9/564 ,  H03H2003/021 ,  H03H2003/025

Abstract: An RF circuit device using modified lattice, lattice, and ladder circuit topologies. The devices can include four resonator devices and four shunt resonator devices. In the ladder topology, the resonator devices are connected in series from an input port to an output port while shunt resonator devices are coupled the nodes between the resonator devices. In the lattice topology, a top and a bottom serial configurations each includes a pair of resonator devices that are coupled to differential input and output ports. A pair of shunt resonators is cross-coupled between each pair of a top serial configuration resonator and a bottom serial configuration resonator. The modified lattice topology adds baluns or inductor devices between top and bottom nodes of the top and bottom serial configurations of the lattice configuration. These topologies may be applied using single crystal or polycrystalline bulk acoustic wave (BAW) resonators.