公开(公告)号：US20130217565A1

公开(公告)日：2013-08-22

申请号：US13401220

申请日：2012-02-21

Applicant: Alexander Kastalsky

Inventor： Alexander Kastalsky

IPC: B01J37/08 ,  B01J37/02 ,  B82Y40/00 ,  B82Y30/00

CPC classification number: B01J37/344 ,  B01J23/06 ,  B01J23/745 ,  B01J23/755 ,  B01J35/0013 ,  B01J35/006 ,  B01J35/08 ,  B01J37/023 ,  B82Y30/00 ,  B82Y40/00

Abstract: Two methods of producing nano-pads of catalytic metal for growth of single walled carbon nanotubes (SWCNT) are disclosed. Both methods utilize a shadow mask technique, wherein the nano-pads are deposited from the catalytic metal source positioned under the angle toward the vertical walls of the opening, so that these walls serve as a shadow mask.In the first case, the vertical walls of the photo-resist around the opening are used as a shadow mask, while in the second case the opening is made in a thin layer of the dielectric layer serving as a shadow mask. Both methods produce the nano-pad areas sufficiently small for the growth of the SWCNT from the catalytic metal balls created after high temperature melting of the nano-pads.

Abstract translation: 公开了制备用于单壁碳纳米管（SWCNT）生长的催化金属纳米垫的两种方法。 两种方法都采用荫罩技术，其中纳米垫从位于开口的垂直壁上的催化金属源沉积，使得这些壁用作荫罩。 在第一种情况下，围绕开口的光致抗蚀剂的垂直壁用作荫罩，而在第二种情况下，开口形成为用作荫罩的介电层的薄层。 两种方法都能使纳米焊盘区域足够小，以便在纳米焊盘高温熔化后产生的催化金属球中SWCNT的生长。

公开(公告)号：US20080191189A1

公开(公告)日：2008-08-14

申请号：US11705577

申请日：2007-02-13

Applicant: Alexander Kastalsky

Inventor： Alexander Kastalsky

IPC: H01L29/06 ,  H01J1/62

CPC classification number: H01L29/0665 ,  B82Y10/00 ,  H01L29/0673 ,  H01L29/0676 ,  H01L51/0048 ,  H01L51/057

Abstract: The Nanotube Array Ballistic Transistors are disclosed, wherein the ballistic (without collisions) electron propagation along the nanotubes, grown normally to the substrate plane on the common metal electrode, is used for a new class of hybrid (solid state/vacuum) electronic devices. In the disclosed transistors, the array of nanotubes emits electrons into vacuum when electrons gain sufficient energy inside the nanotubes due to ballistic electron movement under the voltage applied to the nanotube ends.In the disclosed devices, planar layer deposition technology is used to form multilayer structures and attach two electrodes to the nanotubes ends.The ballistic transistor can also be used for making a new type of electron-emission display when a phosphor layer is deposited on the anode electrode.The non-ballistic nanotube array transistor, employing field-induced electron emission and the same planar layer deposition technique, is also disclosed, the device being considered to be a transistor approaching terahertz frequency range of operation.

Abstract translation: 公开了纳米管阵列弹道晶体管，其中沿公共金属电极正常生长的纳米管的电子传播（无碰撞）用于新型的混合（固态/真空）电子器件。 在所公开的晶体管中，当电子在纳米管端部施加的电压下由于弹道电子运动而在纳米管内获得足够的能量时，纳米管阵列将电子发射成真空。 在所公开的装置中，使用平面层沉积技术来形成多层结构并且将两个电极连接到纳米管末端。 当荧光体层沉积在阳极上时，弹道晶体管也可用于制造新型的电子发射显示。 还公开了使用场致电子发射和相同的平面层沉积技术的非弹道纳米管阵列晶体管，该器件被认为是接近太赫兹频率操作范围的晶体管。

公开(公告)号：US20080191138A1

公开(公告)日：2008-08-14

申请号：US11703805

申请日：2007-02-08

Applicant: Alexander Kastalsky ,  Serge Luryi

Inventor： Alexander Kastalsky ,  Serge Luryi

IPC: G01T1/20

CPC classification number: G01T1/2928 ,  G01T1/2018

Abstract: A multilayer semiconductor scintillator is disclosed for detection, energy quantification, and determination to source of high-energy radiation, such as gamma or X-ray photons or other particles that produce ionizing interaction in semiconductors. The basic embodiment of the inventive detector comprises a multiplicity of stacked direct-gap compound semiconductor wafers, such as InP and GaAs, each wafer heavily doped n-type so as to maximize its transparency to scintillating radiation. Each wafer is further endowed with surface means for detection of said scintillating radiation, such a hetero-epitaxial p-i-n photodiode. In a preferred embodiment, the photodiode layer in each wafer is pixellated so as to provide the x and y coordinates of an ionizing interaction event. Combined with the z coordinate provided by the wafer index in the stack, the inventive detector yields the three-dimensional coordinates of each ionizing interaction event associated with absorption of an individual quantum of high-energy radiation. This three-dimensional information enables a further disclosed advantageous analysis method that is suitable for rapid identification of radioactive isotopes and determination of the direction to the source of radiation.

Abstract translation: 公开了用于检测，能量定量和确定高能辐射源，例如在半导体中产生电离相互作用的γ或X射线光子或其他颗粒的多层半导体闪烁体。 本发明检测器的基本实施例包括多个堆叠的直接间隙化合物半导体晶片，例如InP和GaAs，每个晶片重掺杂n型，以使其对闪烁辐射的透明度最大化。 每个晶片还具有用于检测所述闪烁辐射的表面装置，这种异质外延p-i-n光电二极管。 在优选实施例中，每个晶片中的光电二极管层被像素化，以提供电离相互作用事件的x和y坐标。 结合由堆叠中的晶片索引提供的z坐标，本发明的检测器产生与单个量子的高能量辐射的吸收相关联的每个电离相互作用事件的三维坐标。 这种三维信息使得能够进一步公开有利的分析方法，其适用于快速识别放射性同位素和确定辐射源的方向。

公开(公告)号：US07327080B2

公开(公告)日：2008-02-05

申请号：US10974311

申请日：2004-10-27

Applicant: Frank J. DiSanto ,  Denis A. Krusos ,  Sergey L. Shokhor ,  Alexander Kastalsky ,  Anthony J. Campisi

Inventor： Frank J. DiSanto ,  Denis A. Krusos ,  Sergey L. Shokhor ,  Alexander Kastalsky ,  Anthony J. Campisi

IPC: H01J1/62

CPC classification number: H01J1/304 ,  H01J31/127 ,  H01J2201/30469 ,  H01J2329/0455

Abstract: A field emission display comprises an anode comprising a matrix of pixels and a cathode comprising an insulating layer defining a plurality of wells having a conductor therein. A first conductive layer forms a plurality of conductive pads, each of the conductive pads corresponding to one of the wells. A plurality of nanostructures are electrically coupled to the conductive pads. A second conductive layer is formed over the insulating layer and provides a plurality of gate electrodes. When a potential between the conductive pads and gate electrodes exceeds a threshold voltage, the nanostructures emit electrons that impinge on the pixels.

Abstract translation: 场发射显示器包括包括像素矩阵的阳极和包括限定在其中具有导体的多个阱的绝缘层的阴极。 第一导电层形成多个导电焊盘，每个导电焊盘对应于一个阱。 多个纳米结构电耦合到导电焊盘。 在绝缘层上形成第二导电层，并提供多个栅电极。 当导电焊盘和栅电极之间的电位超过阈值电压时，纳米结构发射撞击像素的电子。

公开(公告)号：US07274136B2

公开(公告)日：2007-09-25

申请号：US10782580

申请日：2004-02-19

Applicant: Frank J. DiSanto ,  Denis A. Krusos ,  Segey L. Shokhor ,  Alexander Kastalsky

Inventor： Frank J. DiSanto ,  Denis A. Krusos ,  Segey L. Shokhor ,  Alexander Kastalsky

IPC: H01J1/304

CPC classification number: G09G3/22 ,  H01J29/96 ,  H01J31/127 ,  H01J2217/491 ,  H01J2217/492

Abstract: A cold-cathode flat panel display using thin-film-transistor (TFT) anode circuit is disclosed. Associated with each pixel element is a TFT circuit comprising first and second transistors electrically cascaded and a capacitor in communication with an output of the first device and an input of the second transistor used to selectively address pixel elements in the display and hold pixels in their selected states for the frame time. Cold cathode sources are used to emit electrons that are drawn to selected pixel elements that include phosphor areas, which emit light of a known wavelength when struck by the emitted electrons.

Abstract translation: 公开了一种使用薄膜晶体管（TFT）阳极电路的冷阴极平板显示器。 与每个像素元件相关联的是TFT电路，其包括电级联的第一和第二晶体管，以及与第一器件的输出端连通的电容器和用于选择性地寻址显示器中的像素元件并保持其所选择的像素的第二晶体管的输入端 状态为帧时间。 冷阴极源用于发射被吸引到包括荧光体区域的选定像素元件的电子，当被发射的电子撞击时，其发射已知波长的光。

公开(公告)号：US07176478B2

公开(公告)日：2007-02-13

申请号：US10764168

申请日：2004-01-26

Applicant: Alexander Kastalsky ,  Sergey Shokhor

Inventor： Alexander Kastalsky ,  Sergey Shokhor

IPC: H01L29/03

CPC classification number: B82Y10/00 ,  H01J19/24 ,  H01J21/04 ,  H01J21/105 ,  H01J2201/30469 ,  Y10S977/876 ,  Y10S977/936 ,  Y10S977/938

Abstract: New, hybrid vacuum electron devices are proposed, in which the electrons are extracted from the nanotube into vacuum. Each nanotube is either placed on the cathode electrode individually or grown normally to the cathode plane. Arrays of the nanotubes are also considered to multiply the output current. Two- and three-terminal device configurations are discussed. In all the cases considered, the device designs are such that both input and output capacitances are extremely low, while the efficiency of the electron extraction into vacuum is very high, so that the estimated operational frequencies are expected to be in a tera-hertz range. New vacuum triode structure with ballistic electron propagation along the nanotube is also considered.

Abstract translation: 提出了新的混合真空电子器件，其中电子从纳米管中提取为真空。 每个纳米管或者单独地放置在阴极电极上或正常地生长到阴极平面。 纳米管阵列也被认为是乘以输出电流。 讨论了两端和三端设备配置。 在所有考虑的情况下，器件设计使得输入和输出电容都非常低，而电子提取到真空中的效率非常高，所以估计的工作频率预期为tera-Hz范围 。 也考虑了具有沿纳米管的弹道电子传播的新的真空三极管结构。

公开(公告)号：US4872744A

公开(公告)日：1989-10-10

申请号：US144817

申请日：1988-01-15

Applicant: Joseph H. Abeles ,  Alexander Kastalsky ,  Robert F. Leheny

Inventor： Joseph H. Abeles ,  Alexander Kastalsky ,  Robert F. Leheny

IPC: G02F1/015 ,  G02F1/017 ,  H01L29/778 ,  H01L31/0352 ,  H01L31/112

CPC classification number: B82Y20/00 ,  G02F1/01708 ,  H01L29/7783 ,  H01L31/0352 ,  H01L31/1123 ,  G02F2001/0156

Abstract: High speed optoelectronic devices which are suitable for use in an optical integrated circuit design. The devices comprise a monolithic planar structure wherein exciton-resonant light propagates along a single mode waveguide containing a single quantum well as the absorbing media. Optical absorption is controlled by the bleaching effect induced by free carriers whose electrical conduction makes possible optical detection and monolithic high speed, gate-controlled transistor structures.

Abstract translation: 适用于光集成电路设计的高速光电器件。 这些器件包括单片平面结构，其中激子谐振光沿着包含单个量子阱的单模式波导作为吸收介质传播。 光吸收由自由载流子诱导的漂白效应控制，其导电使得光学检测和单片高速门控晶体管结构成为可能。

公开(公告)号：US20140155253A9

公开(公告)日：2014-06-05

申请号：US13401220

申请日：2012-02-21

Applicant: Alexander Kastalsky

Inventor： Alexander Kastalsky

IPC: B01J37/08 ,  B01J37/02 ,  B82Y40/00 ,  B82Y30/00

CPC classification number: B01J37/344 ,  B01J23/06 ,  B01J23/745 ,  B01J23/755 ,  B01J35/0013 ,  B01J35/006 ,  B01J35/08 ,  B01J37/023 ,  B82Y30/00 ,  B82Y40/00

Abstract: Two methods of producing nano-pads of catalytic metal for growth of single walled carbon nanotubes (SWCNT) are disclosed. Both methods utilize a shadow mask technique, wherein the nano-pads are deposited from the catalytic metal source positioned under the angle toward the vertical walls of the opening, so that these walls serve as a shadow mask.In the first case, the vertical walls of the photo-resist around the opening are used as a shadow mask, while in the second case the opening is made in a thin layer of the dielectric layer serving as a shadow mask. Both methods produce the nano-pad areas sufficiently small for the growth of the SWCNT from the catalytic metal balls created after high temperature melting of the nano-pads.

Abstract translation: 公开了制备用于单壁碳纳米管（SWCNT）生长的催化金属纳米垫的两种方法。 两种方法都采用荫罩技术，其中纳米垫从位于开口的垂直壁上的催化金属源沉积，使得这些壁用作荫罩。 在第一种情况下，围绕开口的光致抗蚀剂的垂直壁用作荫罩，而在第二种情况下，开口形成为用作荫罩的介电层的薄层。 两种方法都能使纳米焊盘区域足够小，以便在纳米焊盘高温熔化后产生的催化金属球中SWCNT的生长。

公开(公告)号：US20090189143A1

公开(公告)日：2009-07-30

申请号：US12011044

申请日：2008-01-24

Applicant: Alexander Kastalsky

Inventor： Alexander Kastalsky

IPC: H01L29/06

CPC classification number: H01L27/283 ,  B82Y10/00 ,  H01L51/0048 ,  H01L51/0558 ,  H01L51/057

Abstract: Carbon nanotube (CNT)-based devices and technology for their fabrication are disclosed. The discussed electronic and photonic devices and circuits rely on the nanotube arrays grown on a variety of substrates, such as glass or Si wafer. The planar, multiple layer deposition technique and simple methods of change of the nanotube conductivity type during the device processing are utilized to provide a simple and cost effective technology for a large scale circuit integration. Such devices as p-n diode, CMOS-like circuit, bipolar transistor, light emitting diode and laser are disclosed, all of them are expected to have superior performance then their semiconductor-based counterparts due to excellent CNT electrical and optical properties. When fabricated on Si-wafers, the CNT-based devices can be combined with the Si circuit elements, thus producing hybrid Si-CNT devices and circuits.

Abstract translation: 公布了基于碳纳米管（CNT）的器件及其制造技术。 所讨论的电子和光子器件和电路依赖于在各种衬底上生长的纳米管阵列，例如玻璃或Si晶片。 利用平面多层沉积技术和在器件处理期间纳米管导电类型的简单改变方法为大规模电路集成提供简单且成本有效的技术。 公开了诸如p-n二极管，类CMOS电路，双极晶体管，发光二极管和激光器的器件，由于优异的CNT电气和光学性能，它们都期望具有优于其半导体的对应物的性能。 当在Si晶片上制造时，基于CNT的器件可以与Si电路元件组合，从而产生混合的Si-CNT器件和电路。

公开(公告)号：US07265354B2

公开(公告)日：2007-09-04

申请号：US11144443

申请日：2005-06-06

Applicant: Alexander Kastalsky ,  Serge Luryi ,  Boris Spivak

Inventor： Alexander Kastalsky ,  Serge Luryi ,  Boris Spivak

IPC: C09K11/54 ,  G01T1/20

CPC classification number: G01T1/2018

Abstract: A high-energy radiation detector is disclosed which uses a semiconductor material to absorb high-energy radiation and emit secondary light in response. The semiconductor is designed to be largely transparent for the interband light it emits so that the generated secondary photons can reach the semiconductor surface, to be detected by a suitable photo-detector. The semiconductor thus plays a role of a scintillator with the emitted light registered by a photo-detector.Two different device embodiments are disclosed. The first embodiment employs a uniform bulk slab of the appropriately chosen semiconductor, such as n-doped InP. Its principal advantage lies in the simplicity and low cost. The second device employs a multi-layer heterostructure. The principal advantage of the second type detector is the possibility of a substantial enhancement in the efficiency of absorption of the primary high-energy radiation.With appropriate modifications the disclosed detector can be used both for radiation monitoring, like a Gaiger counter, and for high-resolution analysis and characterization of the ionizing radiation.

Abstract translation: 公开了一种高能辐射检测器，其使用半导体材料来吸收高能辐射并响应于发射二次光。 半导体被设计为对于其发射的带间光而言是很透明的，使得所产生的次级光子可以到达半导体表面，由适当的光检测器检测。 因此，半导体起到闪光体的作用，其中发射的光由光检测器记录。 公开了两种不同的设备实施例。 第一实施例采用适当选择的半导体的均匀块状板，例如n掺杂InP。 其主要优点在于简单性和低成本。 第二装置采用多层异质结构。 第二类型检测器的主要优点是可以显着提高初级高能辐射的吸收效率。 通过适当的修改，所公开的检测器既可用于辐射监测，如Gaiger计数器，也可用于电离辐射的高分辨率分析和表征。