System and method for producing precision timing signals
    1.
    发明申请
    System and method for producing precision timing signals 有权
    用于产生精确定时信号的系统和方法

    公开(公告)号:US20050289379A1

    公开(公告)日:2005-12-29

    申请号:US10878341

    申请日:2004-06-28

    摘要: Systems and methods are provided for providing precision timing signals. A first register bank, driven by a first clock signal, provides a first delay along a first signal path. A second register bank, driven by a second clock signal related to the first clock signal, provides a second delay along a second signal path. A system control controls at least one of the first and second banks of registers to control the first and second delays, as to provide a desired skew between the output of the first signal path and the second signal path.

    摘要翻译: 提供了提供精确定时信号的系统和方法。 由第一时钟信号驱动的第一寄存器组沿着第一信号路径提供第一延迟。 由与第一时钟信号相关的第二时钟信号驱动的第二寄存器组沿着第二信号路径提供第二延迟。 系统控制控制第一和第二组寄存器中的至少一个以控制第一和第二延迟,以便在第一信号路径的输出和第二信号路径之间提供期望的偏移。

    Programmable gain amplifier and method
    2.
    发明申请
    Programmable gain amplifier and method 有权
    可编程增益放大器和方法

    公开(公告)号:US20060192618A1

    公开(公告)日:2006-08-31

    申请号:US11065859

    申请日:2005-02-25

    IPC分类号: H03G3/10

    摘要: One embodiment of the present invention may include a programmable gain amplifier comprising an input multiplexer operative to sequentially select input signals for amplification. The input signals may be chosen from a plurality of input signals based on a selection signal. The programmable gain amplifier may include at least one amplifier gain stage operative to apply a variable gain amount to a selected input signal. The programmable gain amplifier may further include a gain mapping component that controls the variable gain amount for each of the selected input signals.

    摘要翻译: 本发明的一个实施例可以包括可编程增益放大器,该可编程增益放大器包括输入多路复用器,用于顺序地选择输入信 可以基于选择信号从多个输入信号中选择输入信号。 可编程增益放大器可以包括至少一个放大器增益级,用于将可变增益量应用于所选择的输入信号。 可编程增益放大器还可以包括增益映射分量,其控制每个所选输入信号的可变增益量。

    System and method for generating pseudorandom numbers
    3.
    发明授权
    System and method for generating pseudorandom numbers 有权
    用于生成伪随机数的系统和方法

    公开(公告)号:US07512645B2

    公开(公告)日:2009-03-31

    申请号:US10804750

    申请日:2004-03-19

    IPC分类号: G06F1/02

    CPC分类号: G06F7/584

    摘要: A system that has a pseudorandom number generator and a mapping system. The pseudorandom number generator generates a random number that is mapped by the mapping system to an output value that is selected from a set of predetermined output values. To increase the randomness of the sequence of numbers generated by the pseudorandom number generator, a tap and/or seed value of the pseudorandom number generator can be varied.

    摘要翻译: 具有伪随机数生成器和映射系统的系统。 伪随机数生成器生成由映射系统映射到从一组预定输出值中选择的输出值的随机数。 为了增加由伪随机数发生器产生的数字序列的随机性,可以改变伪随机数发生器的抽头和/或种子值。

    System and method for generating pseudorandom numbers
    4.
    发明申请
    System and method for generating pseudorandom numbers 有权
    用于生成伪随机数的系统和方法

    公开(公告)号:US20050207574A1

    公开(公告)日:2005-09-22

    申请号:US10804750

    申请日:2004-03-19

    IPC分类号: G06F7/58 H04L9/00

    CPC分类号: G06F7/584

    摘要: A system that has a pseudorandom number generator and a mapping system. The pseudorandom number generator generates a random number that is mapped by the mapping system to an output value that is selected from a set of predetermined output values. To increase the randomness of the sequence of numbers generated by the pseudorandom number generator, a tap and/or seed value of the pseudorandom number generator can be varied.

    摘要翻译: 具有伪随机数生成器和映射系统的系统。 伪随机数生成器生成由映射系统映射到从一组预定输出值中选择的输出值的随机数。 为了增加由伪随机数发生器产生的数字序列的随机性,可以改变伪随机数发生器的抽头和/或种子值。

    Bidirectional deglitch circuit
    5.
    发明申请
    Bidirectional deglitch circuit 有权
    双向deglitch电路

    公开(公告)号:US20060103432A1

    公开(公告)日:2006-05-18

    申请号:US11192969

    申请日:2005-07-29

    IPC分类号: G01R29/02

    CPC分类号: H03K19/00346

    摘要: A deglitch circuit utilizes a first flip-flop coupled to the input signal and a second flip-flop coupled to the output of a circuit with feedback from the output to gates to control first and second inputs to the first flip-flop. In an alternative arrangement, a counter is provided between the output of the first flip-flop and the input to the second flip-flop in order to provide flexibility and the possibility of a longer delay for the circuit.

    摘要翻译: 去交点电路利用耦合到输入信号的第一触发器和耦合到电路的输出的第二触发器,其具有从输出到门的反馈以控制到第一触发器的第一和第二输入。 在替代方案中,在第一触发器的输出和第二触发器的输入之间提供一个计数器,以提供灵活性以及延迟延迟的可能性。

    Programmable gain amplifier and method
    6.
    发明授权
    Programmable gain amplifier and method 有权
    可编程增益放大器和方法

    公开(公告)号:US07215202B2

    公开(公告)日:2007-05-08

    申请号:US11065859

    申请日:2005-02-25

    IPC分类号: H03G3/30

    摘要: One embodiment of the present invention may include a programmable gain amplifier comprising an input multiplexer operative to sequentially select input signals for amplification. The input signals may be chosen from a plurality of input signals based on a selection signal. The programmable gain amplifier may include at least one amplifier gain stage operative to apply a variable gain amount to a selected input signal. The programmable gain amplifier may further include a gain mapping component that controls the variable gain amount for each of the selected input signals.

    摘要翻译: 本发明的一个实施例可以包括可编程增益放大器,该可编程增益放大器包括输入多路复用器,用于顺序地选择用于放大的输入信号。 可以基于选择信号从多个输入信号中选择输入信号。 可编程增益放大器可以包括至少一个放大器增益级,用于将可变增益量应用于所选择的输入信号。 可编程增益放大器还可以包括增益映射分量,其控制每个所选输入信号的可变增益量。

    Full backside etching for pressure sensing silicon
    7.
    发明申请
    Full backside etching for pressure sensing silicon 有权
    用于压力感测硅的全面背面蚀刻

    公开(公告)号:US20070004207A1

    公开(公告)日:2007-01-04

    申请号:US11171939

    申请日:2005-06-30

    IPC分类号: H01L21/302

    摘要: The formation of a semiconductor sensing device is disclosed, where the device can be used to sense pressure, for example. The device is formed by etching the entire backside of a semiconductor substrate or wafer. This streamlines the fabrication process by omitting a number of steps that would otherwise be required to selectively etch certain locations of the substrate. This also improves device performance and compactness by allowing associated support circuitry to be formed closer to a sensing region, and more particularly piezoelectric elements of the sensing region.

    摘要翻译: 公开了半导体感测装置的形成,其中例如可以使用该装置感测压力。 该器件通过蚀刻半导体衬底或晶片的整个背面而形成。 这通过省略了选择性地蚀刻衬底的某些位置所需要的许多步骤来简化制造工艺。 这还通过允许相关联的支持电路形成为更接近感测区域,更具体地,感测区域的压电元件,来提高设备性能和紧凑性。

    Process tracking limiter for VCO control voltages

    公开(公告)号:US20060071715A1

    公开(公告)日:2006-04-06

    申请号:US10954932

    申请日:2004-09-30

    IPC分类号: H03L7/00

    CPC分类号: H03L7/0891 H03L7/10

    摘要: A control voltage window generator that tracks process, voltage supply, and temperature variations for a voltage controlled oscillator includes: a first transistor of a first conductivity type coupled between a supply voltage node and an upper control voltage node; and a second transistor of a second conductivity type coupled to the upper control voltage node to compensate for process variations in devices of the first conductivity type. Additionally, a target pull-in voltage generator includes circuitry for providing a pull-in control voltage that will always be inside the control voltage window, and also tracks process, voltage supply, and temperature variations.