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公开(公告)号：US08706070B2
公开(公告)日：2014-04-22
申请号：US13272537
申请日：2011-10-13
申请人： Ali Tombak , Joshua J. Caron , Daniel Charles Kerr
发明人： Ali Tombak , Joshua J. Caron , Daniel Charles Kerr
IPC分类号： H04B1/10
摘要： An RF system for reducing intermodulation (IM) products is disclosed. The RF system includes a first nonlinear element and a second nonlinear element, wherein the second nonlinear element generates inherent IM products and the first nonlinear element is adapted to generate compensating IM products. Alternatively, the first nonlinear element generates inherent IM products and the second nonlinear element is adapted to generate compensating IM products. The amplitudes of the compensating IM products are substantially equal to amplitudes of the inherent IM products. The RF system further includes a phase shifter that is adapted to provide a phase shift that results in around 180° of phase shift between the inherent IM products and the compensating IM products. The phase shifter is coupled between the first nonlinear element and the second nonlinear element.
摘要翻译： 公开了用于减少互调（IM）产品的RF系统。 RF系统包括第一非线性元件和第二非线性元件，其中第二非线性元件产生固有的IM产品，并且第一非线性元件适于产生补偿IM产品。 或者，第一非线性元件产生固有的IM产品，并且第二非线性元件适于产生补偿IM产品。 补偿IM产品的振幅基本上等于固有IM产品的振幅。 RF系统还包括移相器，其适于提供导致固有IM产品和补偿IM产品之间的相移大约180°的相移。 移相器耦合在第一非线性元件和第二非线性元件之间。
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公开(公告)号：US20120238230A1
公开(公告)日：2012-09-20
申请号：US13272537
申请日：2011-10-13
申请人： Ali Tombak , Joshua J. Caron , Daniel Charles Kerr
发明人： Ali Tombak , Joshua J. Caron , Daniel Charles Kerr
摘要： An RF system for reducing intermodulation (IM) products is disclosed. The RF system includes a first nonlinear element and a second nonlinear element, wherein the second nonlinear element generates inherent IM products and the first nonlinear element is adapted to generate compensating IM products. Alternatively, the first nonlinear element generates inherent IM products and the second nonlinear element is adapted to generate compensating IM products. The amplitudes of the compensating IM products are substantially equal to amplitudes of the inherent IM products. The RF system further includes a phase shifter that is adapted to provide a phase shift that results in around 180° of phase shift between the inherent IM products and the compensating IM products. The phase shifter is coupled between the first nonlinear element and the second nonlinear element.
摘要翻译： 公开了用于减少互调（IM）产品的RF系统。 RF系统包括第一非线性元件和第二非线性元件，其中第二非线性元件产生固有的IM产品，并且第一非线性元件适于产生补偿IM产品。 或者，第一非线性元件产生固有的IM产品，并且第二非线性元件适于产生补偿IM产品。 补偿IM产品的振幅基本上等于固有IM产品的振幅。 RF系统还包括移相器，其适于提供导致固有IM产品和补偿IM产品之间的相移大约180°的相移。 移相器耦合在第一非线性元件和第二非线性元件之间。
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公开(公告)号：US09484973B1
公开(公告)日：2016-11-01
申请号：US12944212
申请日：2010-11-11
申请人： Michael Carroll , Daniel Charles Kerr , Ali Tombak , Philip Mason
发明人： Michael Carroll , Daniel Charles Kerr , Ali Tombak , Philip Mason
CPC分类号： H04B1/28 , H03K17/102 , H03K17/693 , H04B1/52
摘要： A switch branch that improves voltage uniformity across a series stack of an n-number of transistors is disclosed. A first one of the n-number of transistors is coupled to an input terminal, and an nth one of the n-number of transistors is coupled to an output terminal, where n is a positive integer greater than one. Predetermined parasitic capacitances associated with each of the n-number of transistors are adjustable with respect to capacitance value by predetermined amounts by dimensioning and arranging at least one metal layer element in proximity to the series stack of the n-number of transistors. Capacitance values for the predetermined parasitic capacitances are selected such that a voltage across the series stack of the n-number of transistors is uniformly distributed. In this way, the n-number of transistors can be reduced without risking a transistor breakdown within the series stack of the n-number of transistors.
摘要翻译： 公开了一种提高n个晶体管的串联堆叠电压均匀性的开关支路。 n个晶体管中的第一个耦合到输入端子，并且n个晶体管中的第n个耦合到输出端子，其中n是大于1的正整数。 与n个晶体管中的每一个相关联的预定的寄生电容通过将n个晶体管的串联堆叠中的至少一个金属层元件的尺寸设置和布置而相对于电容值可调节预定量。 选择预定寄生电容的电容值，使得n个晶体管的串联堆叠上的电压均匀分布。 以这种方式，可以减少n个晶体管，而不会在n个晶体管的串联堆叠内的晶体管击穿的风险。
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公开(公告)号：US08718572B2
公开(公告)日：2014-05-06
申请号：US12961039
申请日：2010-12-06
IPC分类号： H04B1/44
CPC分类号： H04B1/48 , H01L2224/14 , H01L2224/16225 , H04B1/006 , Y10T307/76
摘要： A radio frequency (RF) switch die which includes an antenna port, a plurality of RF ports, a switch fabric for selectively coupling one or more of the RF ports to the antenna port, and control circuitry that is adapted to, in a first mode, direct the switch fabric to couple any one of the plurality of RF ports individually to the antenna port, and in a second mode, couple a selected group of the RF ports to the antenna port. The RF switch die may include M number of RF ports, and be relatively easily reconfigured to provide N number of RF ports, wherein N is less than M. Groups of RF ports may be coupled together to form coupled RF ports that offer different electrical characteristics than non-coupled RF ports.
摘要翻译： 一种射频（RF）开关管芯，包括天线端口，多个RF端口，用于选择性地将一个或多个RF端口耦合到天线端口的开关结构，以及适于以第一模式 引导交换结构将多个RF端口中的任何一个单独地耦合到天线端口，并且在第二模式中，将所选择的一组RF端口耦合到天线端口。 RF开关管芯可以包括M个RF端口，并且相对容易地重新配置以提供N个数量的RF端口，其中N小于M.RF端口组可以耦合在一起以形成提供不同电特性的耦合RF端口 比非耦合RF端口。
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公开(公告)号：US20120139363A1
公开(公告)日：2012-06-07
申请号：US12961039
申请日：2010-12-06
IPC分类号： H02B1/00
CPC分类号： H04B1/48 , H01L2224/14 , H01L2224/16225 , H04B1/006 , Y10T307/76
摘要： A radio frequency (RF) switch die which includes an antenna port, a plurality of RF ports, a switch fabric for selectively coupling one or more of the RF ports to the antenna port, and control circuitry that is adapted to, in a first mode, direct the switch fabric to couple any one of the plurality of RF ports individually to the antenna port, and in a second mode, couple a selected group of the RF ports to the antenna port. The RF switch die may include M number of RF ports, and be relatively easily reconfigured to provide N number of RF ports, wherein N is less than M. Groups of RF ports may be coupled together to form coupled RF ports that offer different electrical characteristics than non-coupled RF ports.
摘要翻译： 一种射频（RF）开关管芯，包括天线端口，多个RF端口，用于选择性地将一个或多个RF端口耦合到天线端口的开关结构，以及适于以第一模式 引导交换结构将多个RF端口中的任何一个单独地耦合到天线端口，并且在第二模式中，将所选择的一组RF端口耦合到天线端口。 RF开关管芯可以包括M个RF端口，并且相对容易地重新配置以提供N个数量的RF端口，其中N小于M.RF端口组可以耦合在一起以形成提供不同电特性的耦合RF端口 比非耦合RF端口。
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公开(公告)号：US09356144B1
公开(公告)日：2016-05-31
申请号：US12854563
申请日：2010-08-11
CPC分类号： H01L29/7841 , H01L27/0255
摘要： The present disclosure relates to gate oxide protection circuits, which are used to protect the gate oxides of field effect transistor (FET) elements from over voltage conditions, particularly during situations in which the gate oxides are particularly vulnerable, such as during certain manufacturing stages. Each gate oxide protection circuit may be coupled to a corresponding FET element through corresponding first and second resistive elements, which are coupled to a corresponding gate connection node and a corresponding first connection node, respectively, of the FET element. The gate connection node and the first connection node are electrically adjacent to opposite sides of the gate oxide of the FET element. Each gate oxide protection circuit may protect its corresponding FET element by limiting a voltage between the gate connection node and the first connection node.
摘要翻译： 本公开涉及栅极氧化物保护电路，其用于保护场效应晶体管（FET）元件的栅极氧化物免受过电压条件，特别是在栅极氧化物特别容易受到影响的情况下，例如在某些制造阶段。 每个栅极氧化物保护电路可以通过对应的第一和第二电阻元件耦合到对应的FET元件，该第一和第二电阻元件分别耦合到FET元件的对应的栅极连接节点和相应的第一连接节点。 栅极连接节点和第一连接节点与FET元件的栅极氧化物的相对侧电气相邻。 每个栅极氧化物保护电路可以通过限制栅极连接节点和第一连接节点之间的电压来保护其对应的FET元件。
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公开(公告)号：US08076750B1
公开(公告)日：2011-12-13
申请号：US12958494
申请日：2010-12-02
IPC分类号： H01L29/00
CPC分类号： H01L23/645 , H01L23/5227 , H01L23/552 , H01L23/66 , H01L2924/0002 , H01L2924/00
摘要： The present invention relates to using a trap-rich layer, such as a polycrystalline Silicon layer, over a semiconductor substrate to substantially immobilize a surface conduction layer at the surface of the semiconductor substrate at radio frequency (RF) frequencies. The trap-rich layer may have a high density of traps that trap carriers from the surface conduction layer. The average release time from the traps may be longer than the period of any present RF signals, thereby effectively immobilizing the surface conduction layer, which may substantially prevent capacitance and inductance changes due to the RF signals. Therefore, harmonic distortion of the RF signals may be significantly reduced or eliminated. The semiconductor substrate may be a Silicon substrate, a Gallium Arsenide substrate, or another substrate.
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8.发明授权Linearity improvements of semiconductor substrate based radio frequency devices 有权基于半导体衬底的射频器件的线性改善公开(公告)号：US07868419B1
公开(公告)日：2011-01-11
申请号：US12254499
申请日：2008-10-20
IPC分类号： H01L27/08
CPC分类号： H01L23/645 , H01L23/5227 , H01L23/552 , H01L23/66 , H01L2924/0002 , H01L2924/00
摘要： The present invention relates to using a trap-rich layer, such as a polycrystalline Silicon layer, over a semiconductor substrate to substantially immobilize a surface conduction layer at the surface of the semiconductor substrate at radio frequency (RF) frequencies. The trap-rich layer may have a high density of traps that trap carriers from the surface conduction layer. The average release time from the traps may be longer than the period of any present RF signals, thereby effectively immobilizing the surface conduction layer, which may substantially prevent capacitance and inductance changes due to the RF signals. Therefore, harmonic distortion of the RF signals may be significantly reduced or eliminated. The semiconductor substrate may be a Silicon substrate, a Gallium Arsenide substrate, or another substrate.
摘要翻译： 本发明涉及在半导体衬底上使用诸如多晶硅层的富集层，以基本上以射频（RF）频率固定在半导体衬底的表面处的表面传导层。 富集阱层可具有高密度的陷阱，其将载流子从表面传导层捕获。 来自陷阱的平均释放时间可以比任何现有RF信号的周期长，从而有效地固定表面传导层，这可以基本上防止由于RF信号引起的电容和电感变化。 因此，可以显着地减少或消除RF信号的谐波失真。 半导体衬底可以是硅衬底，砷化镓衬底或另一衬底。
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9.发明申请Bipolar Junction Transistor with a Reduced Collector-Substrate Capacitance 审中-公开具有减少集电极 - 基板电容的双极结晶体管公开(公告)号：US20100032766A1
公开(公告)日：2010-02-11
申请号：US12308158
申请日：2006-06-02
申请人： Alan Sangone Chen , Mark Victor Dyson , Edward Belden Harris , Daniel Charles Kerr , William John Nagy
发明人： Alan Sangone Chen , Mark Victor Dyson , Edward Belden Harris , Daniel Charles Kerr , William John Nagy
IPC分类号： H01L27/102 , H01L21/331 , H01L21/8249 , H01L29/73
CPC分类号： H01L29/0821 , H01L29/404
摘要： A process for forming a bipolar junction transistor (BJT) in a semiconductor substrate and a BJT formed according to the process. A buried isolation region is formed underlying BJT structures to isolate the BJT structures from the p-type semi-conductor substrate. To reduce capacitance between a BJT subcollector and the buried isolation region, prior to implanting the subcollector spaced-apart structures are formed on a surface of the substrate. The subcollector is formed by implanting ions through the spaced-apart structures and through a region intermediate the spaced-apart structures. The formed BJT subcollector therefore comprises a body portion and end portions extending therefrom, with the end portions disposed at a shallower depth than the body portion, since the ions implanting the end portions must pass through the spaced-apart structures. The shallower depth of the end portions reduces the capacitance.
摘要翻译： 在半导体衬底中形成双极结型晶体管（BJT）的工艺和根据该工艺形成的BJT。 在BJT结构之下形成掩埋隔离区，以将BJT结构与p型半导体衬底隔离。 为了减小BJT子集电极和掩埋隔离区之间的电容，在植入之前，在基板的表面上形成间接分离结构的子集电极。 子集电极通过将离子注入间隔开的结构并通过间隔开的结构之间的区域而形成。 因此，形成的BJT子集电极包括主体部分和从其延伸的端部，其端部设置在比主体部分更浅的深度，因为注入端部的离子必须通过间隔开的结构。 端部较浅的深度减小了电容。
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10.发明授权公开(公告)号：US07449388B2
公开(公告)日：2008-11-11
申请号：US11458270
申请日：2006-07-18
IPC分类号： H01L21/331
CPC分类号： H01L29/66272 , H01L21/8249 , H01L27/0623 , H01L27/0928 , H01L29/0821
摘要： A process for forming bipolar junction transistors having a plurality of different collector doping densities on a semiconductor substrate and an integrated circuit comprising bipolar junction transistors having a plurality of different collector doping densities. A first group of the transistors are formed during formation of a triple well for use in providing triple well isolation for complementary metal oxide semiconductor field effect transistors also formed on the semiconductor substrate. Additional bipolar junction transistors with different collector doping densities are formed during a second doping step after forming a gate stack for the field effect transistors. Implant doping through bipolar transistor emitter windows forms bipolar transistors having different doping densities than the previously formed bipolar transistors. According to one embodiment of the present invention, bipolar junction transistors having six different collector dopant densities (and thus six different breakdown characteristics) are formed.
摘要翻译： 一种用于形成在半导体衬底上具有多个不同集电极掺杂密度的双极结型晶体管的工艺，以及包括具有多个不同集电极掺杂密度的双极结型晶体管的集成电路。 第一组晶体管在形成三阱期间形成，用于为也形成在半导体衬底上的互补金属氧化物半导体场效应晶体管提供三阱隔离。 在形成用于场效应晶体管的栅叠层之后的第二掺杂步骤期间，形成具有不同集电极掺杂密度的附加双极结型晶体管。 通过双极晶体管发射极窗口进行的种植体掺杂形成了与先前形成的双极晶体管不同的掺杂密度的双极晶体管。 根据本发明的一个实施例，形成具有六种不同集电极掺杂剂密度（并因此具有六种不同击穿特性）的双极结型晶体管。
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