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    Arrangement for combining data symbols in accordance with a predetermined weighting function
    3.
    发明授权
    Arrangement for combining data symbols in accordance with a predetermined weighting function 失效
    用于根据预定加权函数组合数据符号的布置

    公开(公告)号：US4105863A

    公开(公告)日：1978-08-08

    申请号：US752066

    申请日：1976-12-20

    申请人： George J. Kustka

    发明人： George J. Kustka

    IPC分类号： H04L27/18 ,  H04L27/20 ,  H04L27/24

    CPC分类号： H04L27/2025

    摘要： To minimize distortion, a sequence of phase modulated signal elements (data symbols) are combined in accordance with a predetermined shaping (weighting) function by a transversal filter augmented with a baud rate control circuit. The transversal filter includes a plurality of multipliers, located at taps along a delay line, forming products between data symbols and coefficients representing segments of the predetermined weighting function. The baud rate control circuit shifts the phase of the delayed data symbols and delivers these "extended" data symbols to certain multipliers. By digitally processing segments of the weighting function and portions of an overall data symbol this invention yields to compact construction.

    摘要翻译： 为了最小化失真，根据由波特率控制电路增强的横向滤波器，根据预定的整形（加权）函数来组合一系列相位调制信号元件（数据符号）。 横向滤波器包括位于沿延迟线的抽头处的多个乘法器，在数据符号和表示预定加权函数的段的系数之间形成乘积。 波特率控制电路使延迟的数据符号的相位移位，并将这些“扩展”数据符号传送到某些乘法器。 通过数字处理加权函数的分段和本发明的整体数据符号的部分以紧凑的结构。

    Variable length decoder
    4.
    发明授权
    Variable length decoder 失效
    可变长度解码器

    公开(公告)号：US5226082A

    公开(公告)日：1993-07-06

    申请号：US907977

    申请日：1992-07-02

    申请人： George J. Kustka

    发明人： George J. Kustka

    IPC分类号： H03M7/40 ,  H03M7/42 ,  H04L9/18 ,  H04N7/26 ,  H04N7/30

    CPC分类号： H03M7/425 ,  H04L9/065 ,  H04N19/00 ,  H04N19/44 ,  H04L2209/125 ,  H04L2209/34 ,  H04N19/13 ,  H04N19/60 ,  H04N19/91

    摘要： Apparatus for decoding a stream containing codes of a variable length code (VLC) takes advantage of the fact that a trie representation of the VLC can be pruned to leaves that each represent a complete binary trie. Combinational circuits or ROMs are then employed to decode the pruned trie, thereby substantially reducing the complexity of decoding a VLC. In one embodiment the decoding problem is partitioned into segments by considering a few bits at a time, starting with the most significant bits. Each segment either outputs a valid code or informs the next segment that the decoding process is incomplete and provides information to assist the next segment in its decoding effort. In applications where the VL code can be selected for greater efficiency of the decoder, the offered VL code can be restructured to minimize the number of k-nodes, to thereby minimize the pruned trie, and to concomitantly minimize the sizes of the ROMs in the decoder.

    摘要翻译： 用于解码包含可变长度码（VLC）的码的流的装置利用了可以修剪VLC的特里表示以使每个代表完整的二进制特里的事实。 然后使用组合电路或ROM来解码修剪的特里，从而大大降低了解码VLC的复杂度。 在一个实施例中，通过从最高有效位开始一次考虑几个比特来将解码问题划分成段。 每个段都输出有效的代码或通知下一段解码过程不完整，并提供信息以协助下一个段的解码工作。 在可以选择VL代码以获得更高效率的解码器的应用中，可以对所提供的VL代码进行重构以最小化k个节点的数量，从而最小化修剪的特里，并且随机地将最小化ROM中的ROM的大小最小化 解码器。

    Timing recovery technique
    5.
    发明授权
    Timing recovery technique 失效
    定时恢复技术

    公开(公告)号：US4411000A

    公开(公告)日：1983-10-18

    申请号：US185017

    申请日：1980-09-08

    申请人： George J. Kustka

    发明人： George J. Kustka

    IPC分类号： H04L7/02 ,  H04B3/04

    CPC分类号： H04L7/0058

    摘要： In a data receiver (100), sampling circuitry (120, 125) forms samples of a received data signal representing a succession of data symbols. The samples, which are formed at twice the symbol rate, are multiplied by respective ones of a queue of coefficients in a fractionally spaced equalizer (150). Further circuitry (155, 160, 165, 170) forms decisions in response to the resulting products as to the values of the tansmitted symbols and generates error signals. The values of the coefficients are updated in the equalizer in response to the error signals. Timing recovery circuitry (230) within the equalizer periodically identifies the largest of the coefficients and either advances or retards the phase of the sampling circuitry depending on whether that coefficient is or is not within a predetermined portion of the queue. The magnitude of the amount by which the phase is advanced or retarded is determined by the position of the largest coefficient relative to the center of the coefficient queue.

    摘要翻译： 在数据接收器（100）中，采样电路（120,125）形成表示一系列数据符号的接收数据信号的采样。 以符号率两倍形成的采样乘以分数间隔的均衡器（150）中的系数队列中的相应的一个。 进一步的电路（155,160,165,170）响应于所得到的产品形成关于所提供的符号的值的决定并且产生误差信号。 响应于误差信号，在均衡器中更新系数的值。 均衡器内的定时恢复电路（230）周期性地识别最大的系数，并根据该系数是否在队列的预定部分内，前进或延迟采样电路的相位。 通过相对于系数队列的中心的最大系数的位置来确定相位提前或延迟的量的大小。

    UNIVERSAL MULTIMEDIA ENGINE AND METHOD FOR PRODUCING THE SAME
    6.
    发明申请
    UNIVERSAL MULTIMEDIA ENGINE AND METHOD FOR PRODUCING THE SAME 有权
    通用多功能发动机及其生产方法

    公开(公告)号：US20080276157A1

    公开(公告)日：2008-11-06

    申请号：US11742930

    申请日：2007-05-01

    申请人： George J. Kustka ,  Andres C. Gonzalez

    发明人： George J. Kustka ,  Andres C. Gonzalez

    IPC分类号： G06F17/00 ,  G06F7/00

    CPC分类号： H04L65/605 ,  G06F9/54 ,  G06F17/30017 ,  H04L65/602 ,  H04L65/80 ,  H04L67/28 ,  H04L67/2823 ,  H04L67/303 ,  H04L69/24

    摘要： A method, system and apparatus for adapting the multimedia content for presentation by an application that uses, processes or otherwise services the multimedia content (“multimedia application”) is provided. The method includes receiving the multimedia content formatted in accordance with at least one of a plurality of multimedia protocols; using a function abstracted from the plurality of multimedia protocols to adapt the multimedia content in accordance with one or more capabilities of the multimedia application; and sending the multimedia content so adapted to the multimedia application for presentation.

    摘要翻译： 提供了一种用于使多媒体内容适应由使用，处理或以其他方式服务多媒体内容（“多媒体应用”）的应用程序呈现的方法，系统和装置。 该方法包括接收根据多个多媒体协议中的至少一个格式化的多媒体内容; 使用从所述多个多媒体协议抽象的功能来根据所述多媒体应用的一个或多个能力来适应所述多媒体内容; 并发送适合于多媒体应用的多媒体内容进行呈现。

    Equalizer section
    7.
    发明授权
    Equalizer section 失效
    均衡器部分

    公开(公告)号：US4343759A

    公开(公告)日：1982-08-10

    申请号：US196158

    申请日：1980-10-10

    申请人： George J. Kustka ,  Steven J. Sipek

    发明人： George J. Kustka ,  Steven J. Sipek

    IPC分类号： H04L27/01 ,  H04L25/03

    CPC分类号： H04L27/01

    摘要： A data signal receiver (100) forms line samples of a received modulated data signal and applies them to a fractionally spaced equalizer (150). The equalizer outputs are demodulated and decisions are formed as to the values of the transmitted data symbols. The equalizer itself is comprised of a plurality of equalizer sections (220, 240, 260, 280) each of which multiplies ones of the line samples with respective ones of a queue of coefficients to form a partial sum. The partial sums are combined to form the overall equalizer output. Timing recovery and tap rotation control signals generated within the equalizer are generated as a function of the location within the coefficient queue of a reference coefficient, the latter illustratively being the coefficient of largest complex magnitude. An arbitration circuit (680) within each equalizer section determines whether that section holds the reference coefficient. The equalizer section which determines that, in fact, it holds that the reference coefficient enables itself to generate the control signals in question to the exclusion of the other equalizer sections comprising the equalizer.

    摘要翻译： 数据信号接收器（100）形成接收到的调制数据信号的线样本，并将其应用到分数间隔的均衡器（150）。 均衡器输出被解调，并且对发送的数据符号的值形成决定。 均衡器本身由多个均衡器部分（220,240,260,280）组成，每个均衡器部分（220,240,260,280）将一个线样本与系数队列中的相应的一个相乘以形成部分和。 组合部分和形成总均衡器输出。 在均衡器内产生的定时恢复和抽头旋转控制信号作为参考系数的系数队列内的位置的函数产生，后者示例性地是最大复数量级的系数。 每个均衡器部分内的仲裁电路（680）确定该部分是否保持参考系数。 确定实际上它确定参考系数本身能够产生所讨论的控制信号以排除包括均衡器的其它均衡器部分的均衡器部分。

    Generating Single-Slice Pictures Using Paralellel Processors
    8.
    发明申请
    Generating Single-Slice Pictures Using Paralellel Processors 审中-公开
    使用Paralellel处理器生成单片照片

    公开(公告)号：US20120121018A1

    公开(公告)日：2012-05-17

    申请号：US12948176

    申请日：2010-11-17

    申请人： George J. Kustka ,  John T. Falkowski ,  Zhicheng Ni

    发明人： George J. Kustka ,  John T. Falkowski ,  Zhicheng Ni

    IPC分类号： H04N7/26 ,  H04N7/34

    CPC分类号： H04N19/174 ,  H04N19/436

    摘要： A video encoding system generates (e.g., H.264) single-slice pictures using parallel processors. Each picture is divided horizontally into multiple segments, where each different parallel processor processes a different segment. Each parallel processor (other than the first parallel processor of the uppermost segment) only partially processes the macroblocks in the first row of its segment. Subsequently, a final processor completes the processing of the partially encoded, first-row macroblocks based on the encoding results for the macroblocks in the last row of the segment above and across the segment boundary. The encoding of the first-row macroblocks is constrained to enable the encoding of all other rows of macroblocks to be completed by the parallel processors, without relying on the final processor.

    摘要翻译： 视频编码系统使用并行处理器生成（例如H.264）单片图片。 每个图像被水平划分成多个段，其中每个不同的并行处理器处理不同的段。 每个并行处理器（除最上段的第一并行处理器之外）仅部分地处理其段的第一行中的宏块。 随后，最终处理器基于对于段边界的上段和跨越段边界的段的最后一行中的宏块的编码结果来完成部分编码的第一行宏块的处理。 第一行宏块的编码被限制为使得所有其他宏块行的编码能够由并行处理器完成，而不依赖于最终处理器。

    Truncation error correction for predictive coding/encoding
    10.
    发明授权
    Truncation error correction for predictive coding/encoding 失效
    用于预测编码/编码的截断误差校正

    公开(公告)号：US5367336A

    公开(公告)日：1994-11-22

    申请号：US910592

    申请日：1992-07-08

    申请人： George J. Kustka ,  John N. Mailhot

    发明人： George J. Kustka ,  John N. Mailhot

    IPC分类号： H04N7/32 ,  G06T9/00 ,  H03M7/36 ,  H04B14/04 ,  H04N7/26 ,  H04N7/36 ,  H04N7/50 ,  H04N7/137

    CPC分类号： H04N19/90 ,  H04N19/503 ,  H04N19/61

    摘要： Apparatus for eliminating the truncation errors associated with a multiplicative leak factor employed in a predictive coding arrangement adds a temporally varying control signal that affects the leak factor multiplication output. Specifically, in one embodiment the leak factor multiplication output is modified by arbitrarily changing, or dithering, the level of the mean signal. In another embodiment, the leak factor multiplication output is modified by effectively dithering the leak factor itself. The latter is accomplished by adding the varying control signal prior to the truncated division which occurs in the leak factor multiplication process.

    摘要翻译： 用于消除与在预测编码布置中使用的乘法泄漏因子相关联的截断误差的装置增加了影响泄漏因子乘法输出的时间变化的控制信号。 具体来说，在一个实施例中，通过任意改变或抖动平均信号的电平来修改泄漏因子乘法输出。 在另一个实施例中，通过有效地使泄漏因子本身抖动来修改泄漏因子乘法输出。 后者通过在泄漏因子乘法过程中发生的截断除法之前加入变化的控制信号来实现。