摘要:
A method, apparatus, and computer instructions are provided for inlining native functions into compiled Java code. A conversion engine is provided by the present invention for converting the intermediate representation of native functions to the just-in-time (JIT) compiler's intermediate representation. With the converted intermediate representation, an inliner recursively inlines the converted JIT compiler's intermediate representation into the native callsite to remove the need of invoking the native function and subsequent native calls made by the function. The inlining process continues until either a call to an opaque function is encountered or until a JIT compiler intermediate representation growth limits are reached. The inliner also replaces calls to most native functions that are non-inlineable or opaque with calls to synthesized native functions that provide access to native libraries containing implementations of the original non-inlineable calls.
摘要:
A method, apparatus, and computer instructions are provided for transforming Java Native Interface function calls to constants, internal just-in-time compiler operations or simpler intermediate representation. A compiler generates a plurality of intermediate representations for a plurality of native interface function calls. During inlining of native code, matching is performed on each native function call (against this list) and a list of native interface function calls is generated. For each native interface function call, a JIT call transformer attempts to replace the native interface function call with a constant, internal just-in-time compiler operation or a simpler intermediate representation depending on the type of native interface function call.
摘要:
A computer-implemented method, computer program product and data processing system to improve runtime performance of executable program code when executed on the data-processing system. During execution, data is collected and analyzed to identify runtime behavior of the program code. Heuristic models are applied to select region(s) of the program code where application of a performance improvement algorithm is expected to improve runtime performance. Each selected region is recompiled using selected performance improvement algorithm(s) for that region to generate corresponding recompiled region(s), and the program code is modified to replace invocations of each selected region with invocations of the corresponding recompiled region. Alternatively or additionally, the program code may be recompiled to be adapted to characteristics of the execution environment of the data processing system. The process may be carried out in a continuous recursive manner while the program code executes, or may be carried out a finite number of times.
摘要:
A computer-implemented method, computer program product and data processing system to improve runtime performance of executable program code when executed on the data-processing system. During execution, data is collected and analyzed to identify runtime behavior of the program code. Heuristic models are applied to select region(s) of the program code where application of a performance improvement algorithm is expected to improve runtime performance. Each selected region is recompiled using selected performance improvement algorithm(s) for that region to generate corresponding recompiled region(s), and the program code is modified to replace invocations of each selected region with invocations of the corresponding recompiled region. Alternatively or additionally, the program code may be recompiled to be adapted to characteristics of the execution environment of the data processing system. The process may be carried out in a continuous recursive manner while the program code executes, or may be carried out a finite number of times.
摘要:
Data processing delay is reduced during data processing, using compiler optimization. Blocks of code are scanned in an order from blocks recurring most often to blocks recurring least often. In an order from blocks recurring most often to block recurring least often, shifts are inserted before arithmetic references, such that a previous use of the arithmetic reference does not require a shift, shifts are inserted after each memory use such that the next use of the memory does not require a shift, and shifts are inserted after each arithmetic reference such that the next use of the arithmetic reference requires no shift. In addition, if there is a mismatch between the last shifted amount of any one block and the required initial shifted amount in any of its successors, shifts are inserted to make up for the mismatch.
摘要:
Data processing delay is reduced during data processing, using compiler optimization. Blocks of code are scanned in an order from blocks recurring most often to blocks recurring least often. In an order from blocks recurring most often to block recurring least often, shifts are inserted before arithmetic references, such that a previous use of the arithmetic reference does not require a shift, shifts are inserted after each memory use such that the next use of the memory does not require a shift, and shifts are inserted after each arithmetic reference such that the next use of the arithmetic reference requires no shift. In addition, if there is a mismatch between the last shifted amount of any one block and the required initial shifted amount in any of its successors, shifts are inserted to make up for the mismatch.
摘要:
A mechanism is provided that identifies instructions that access storage and may be candidates for catch prefetching. The mechanism augments these instructions so that any given instance of the instruction operates in one of four modes, namely normal, unexecuted, data gathering, and validation. In the normal mode, the instruction merely performs the function specified in the software runtime environment. An instruction in unexecuted mode, upon the next execution, is placed in data gathering mode. When an instruction in the data gathering mode is encountered, the mechanism of the present invention collects data to discover potential fixed storage access patterns. When an instruction is in validation mode, the mechanism of the present invention validates the presumed fixed storage access patterns.
摘要:
An error handling operation for checking of an array access in program code is modified during compilation thereof. A sequentially arranged null checking operation and array bounds checking operation for the array access are located. The array bounds checking operation has a corresponding error handling operation operable for setting an array bounds error. The located sequentially arranged null checking operation is removed. The corresponding error handling operation for the located sequentially arranged array bounds checking operation is modified to perform the removed null checking operation during execution of the program code.
摘要:
A technique for identifying and executing synchronized read regions and synchronized write regions is provided. The technique processes program code with a software tool to convert the code to an internal representation for the software tool and constructs a control flow graph of code blocks which also identifies the entry and exit points for each region of code subject to a lock. For each code block in the control flow graph, visibility analysis is performed. Each determined entry and exit point is moved to enclose the smallest set of code blocks subject to a lock which can be achieved without altering code semantics. A set of trees is created to represent the manner in which the synchronized regions are nested. If the tree contains at least one block previously identified, then the tree is marked a write. Otherwise, the tree is marked a read tree. A write lock is then created for the region in each tree identified as a write tree and a read lock is created for the regions in each tree identified as a read tree.