公开(公告)号：US20080189094A1

公开(公告)日：2008-08-07

申请号：US11672050

申请日：2007-02-07

申请人： Allon Adir ,  Sigal Asaf ,  Laurent Fournier ,  Itai Jaeger ,  Ofer Peled

发明人： Allon Adir ,  Sigal Asaf ,  Laurent Fournier ,  Itai Jaeger ,  Ofer Peled

IPC分类号： G06F17/50

CPC分类号： G06F11/3676 ,  G01R31/318371 ,  G06F11/3684

摘要： Methods and systems are presented for generation of a test suite in order to validate compliance of a process with its process specification. The methodology involves a formal description of the process using a flowchart, refinement of the flowchart to include misinterpretations of the process specification, defining compliance coverage models over the flowchart, and automatically generating test case scenarios that cover the models. Internal and external types of misinterpretation are distinguished. A compliance test suite is automatically generated and observations made of the details of the traversal through the flow chart when the tests are executed.

摘要翻译： 提供了用于生成测试套件的方法和系统，以验证过程符合其过程规范。 该方法涉及使用流程图的过程的正式描述，流程图的改进包括过程规范的误解，在流程图上定义合规性覆盖模型，以及自动生成涵盖模型的测试用例场景。 区别了内部和外部的误解。 自动生成合规性测试套件，并在执行测试时通过流程图遍历的详细信息。

公开(公告)号：US08280713B2

公开(公告)日：2012-10-02

申请号：US11735510

申请日：2007-04-16

申请人： Allon Adir ,  Sigal Asaf ,  Laurent Fournier ,  Itai Jaeger

发明人： Allon Adir ,  Sigal Asaf ,  Laurent Fournier ,  Itai Jaeger

IPC分类号： G06F17/50 ,  G06F9/455

CPC分类号： G06F11/263 ,  G06F8/30

摘要： A parametrically controlled model-based test generator automatically generates architectural compliance test suites for different implementations of a processor architecture, based on a set of architectural decisions chosen among optional behaviors for each implementation. Thus, different implementations of the same architecture can be easily supported by modifying the parameter values. In addition, ongoing changes to the architecture or comprehensive updates to the test suite can be easily handled by updating the architecture model or the coverage models, forgoing the need to review the whole, potentially huge, set of tests.

摘要翻译： 基于对每个实现的可选行为选择的一组架构决策，参数控制的基于模型的测试发生器自动生成用于处理器架构的不同实现的架构一致性测试套件。 因此，可以通过修改参数值来容易地支持相同架构的不同实现。 此外，通过更新架构模型或覆盖模型，可以轻松地处理对架构的持续更改或测试套件的全面更新，从而需要检查整个可能巨大的测试集。

公开(公告)号：US20080255822A1

公开(公告)日：2008-10-16

申请号：US11735510

申请日：2007-04-16

申请人： Allon Adir ,  Sigal Asaf ,  Laurent Fournier ,  Itai Jaeger

发明人： Allon Adir ,  Sigal Asaf ,  Laurent Fournier ,  Itai Jaeger

IPC分类号： G06F9/44

CPC分类号： G06F11/263 ,  G06F8/30

摘要： A parametrically controlled model-based test generator automatically generates architectural compliance test suites for different implementations of a processor architecture, based on a set of architectural decisions chosen among optional behaviors for each implementation. Thus, different implementations of the same architecture can be easily supported by modifying the parameter values. In addition, ongoing changes to the architecture or comprehensive updates to the test suite can be easily handled by updating the architecture model or the coverage models, forgoing the need to review the whole, potentially huge, set of tests.

摘要翻译： 基于对每个实现的可选行为选择的一组架构决策，参数控制的基于模型的测试发生器自动生成用于处理器架构的不同实现的架构一致性测试套件。 因此，可以通过修改参数值来容易地支持相同架构的不同实现。 此外，通过更新架构模型或覆盖模型，可以轻松地处理对架构的持续更改或测试套件的全面更新，从而需要检查整个可能巨大的测试集。

公开(公告)号：US07673261B2

公开(公告)日：2010-03-02

申请号：US11672050

申请日：2007-02-07

申请人： Alion Adir ,  Sigal Asaf ,  Laurent Fournier ,  Itai Jaeger ,  Ofer Peled

发明人： Alion Adir ,  Sigal Asaf ,  Laurent Fournier ,  Itai Jaeger ,  Ofer Peled

IPC分类号： G06F17/50

CPC分类号： G06F11/3676 ,  G01R31/318371 ,  G06F11/3684

摘要： Methods and systems are presented for generation of a test suite in order to validate compliance of a process with its process specification. The methodology involves a formal description of the process using a flowchart, refinement of the flowchart to include misinterpretations of the process specification, defining compliance coverage models over the flowchart, and automatically generating test case scenarios that cover the models. Internal and external types of misinterpretation are distinguished. A compliance test suite is automatically generated and observations made of the details of the traversal through the flow chart when the tests are executed.

摘要翻译： 提供了用于生成测试套件的方法和系统，以验证过程符合其过程规范。 该方法涉及使用流程图的过程的正式描述，流程图的改进包括过程规范的误解，在流程图上定义合规性覆盖模型，以及自动生成涵盖模型的测试用例场景。 区别了内部和外部的误解。 自动生成合规性测试套件，并在执行测试时通过流程图遍历的详细信息。

公开(公告)号：US07434101B2

公开(公告)日：2008-10-07

申请号：US11085791

申请日：2005-03-21

申请人： Allon Adir ,  Roy Emek ,  Itai Jaeger ,  Eitan Marcus ,  Tzach Schechner

发明人： Allon Adir ,  Roy Emek ,  Itai Jaeger ,  Eitan Marcus ,  Tzach Schechner

IPC分类号： G06F11/00

CPC分类号： G01R31/318385 ,  G06F17/5022

摘要： Improvements in functional verification of a design are achieved by providing a test template that specifies test parameters directed to a function of the design. An exemption mode of operation is associated with a portion of the template, in which constraints and variables associated with the template are revised. The template is an input to a CSP engine, which, in cooperation with a test generator engine, produces test scenarios that lie in an expanded region of the generator's usual operational space. Provision is made for independently enabling and disabling a plurality of exemption modes of operation that are associated with the same or different areas of the template.

摘要翻译： 通过提供一个指定针对设计功能的测试参数的测试模板来实现对设计的功能验证的改进。 豁免模式与模板的一部分相关联，其中与模板相关联的约束和变量被修改。 该模板是CSP引擎的输入，CSP引擎与测试发生器引擎协同生成位于发电机通常运行空间扩展区域内的测试场景。 规定用于独立地启用和禁用与模板的相同或不同区域相关联的多个豁免操作模式。

公开(公告)号：US20130196305A1

公开(公告)日：2013-08-01

申请号：US13360808

申请日：2012-01-30

申请人： Allon Adir ,  Itai Jaeger ,  Ronen Levy ,  Tamer Salman

发明人： Allon Adir ,  Itai Jaeger ,  Ronen Levy ,  Tamer Salman

IPC分类号： G09B3/00

CPC分类号： G06Q10/10 ,  G06Q50/205 ,  G09B5/00 ,  G09B7/00 ,  G09B19/00 ,  G09B29/00

摘要： A computer-implemented method and apparatus for generating questions. The method comprises receiving a rule; dynamically generating a graph representing a question, the graph comprising one or more nodes, each node associated with a rule having one or more variables; sampling a value from the value domain for the variable; and synthesizing a textual representation of the graph.

摘要翻译： 用于产生问题的计算机实现的方法和装置。 该方法包括接收规则; 动态生成表示问题的图形，所述图形包括一个或多个节点，每个节点与具有一个或多个变量的规则相关联; 从变量的值域中抽取一个值; 并合成图形的文本表示。

公开(公告)号：US08433668B2

公开(公告)日：2013-04-30

申请号：US12477145

申请日：2009-06-03

申请人： Roy Emek ,  Itai Jaeger ,  Yehuda Naveh

发明人： Roy Emek ,  Itai Jaeger ,  Yehuda Naveh

IPC分类号： G06F17/00 ,  G06N5/02

CPC分类号： G06N5/045

摘要： A method for solving a constraint satisfaction problem (CSP) comprises identifying a first illegal combination associated with at least one variable, wherein the first illegal combination contradicts at least one constraint; grouping the first illegal combination with a second illegal combination, in response to determining that the first and second illegal combinations contradict the same constraint; identifying at least one failure explanation for each group of illegal combinations, wherein the failure explanation is associated with at least one illegal combination in said group to provide a reason for a contradicted constraint associated with the illegal combination; assigning a value to each variable in the given domain to solve the CSP within the limitations defined by the constraints in a solution path; and generating a result, in response to determining that at least one assigned value to a variable contradicts a constraint.

公开(公告)号：US07562061B2

公开(公告)日：2009-07-14

申请号：US11380955

申请日：2006-05-01

申请人： Roy Emek ,  Itai Jaeger ,  Yehuda Naveh

发明人： Roy Emek ,  Itai Jaeger ,  Yehuda Naveh

IPC分类号： G06N5/02

CPC分类号： G06N5/045

摘要： A method for solving a constraint satisfaction problem (CSP) comprises identifying a first illegal combination associated with at least one variable, wherein the first illegal combination contradicts at least one constraint; grouping the first illegal combination with a second illegal combination, in response to determining that the first and second illegal combinations contradict the same constraint; identifying at least one failure explanation for each group of illegal combinations, wherein the failure explanation is associated with at least one illegal combination in said group to provide a reason for a contradicted constraint associated with the illegal combination; assigning a value to each variable in the given domain to solve the CSP within the limitations defined by the constraints in a solution path; and generating a result, in response to determining that at least one assigned value to a variable contradicts a constraint.

摘要翻译： 一种用于解决约束满足问题（CSP）的方法包括：识别与至少一个变量相关联的第一非法组合，其中所述第一非法组合与至少一个约束相矛盾; 响应于确定第一和第二非法组合与相同的约束相矛盾，将第一非法组合与第二非法组合分组; 识别每组非法组合的至少一个故障解释，其中所述故障解释与所述组中的至少一个非法组合相关联，以提供与所述非法组合相关联的矛盾约束的原因; 为给定域中的每个变量分配一个值，以在由解决路径中的约束定义的限制内解决CSP; 以及响应于确定对变量的至少一个分配值与约束相矛盾而产生结果。

公开(公告)号：US07415444B2

公开(公告)日：2008-08-19

申请号：US11383964

申请日：2006-05-18

申请人： Shady Copty ,  Roy Emek ,  Itai Jaeger ,  Yoav Katz ,  Shai Lubliner

发明人： Shady Copty ,  Roy Emek ,  Itai Jaeger ,  Yoav Katz ,  Shai Lubliner

IPC分类号： G06E1/00 ,  G06E3/00 ,  G06F15/18 ,  G06G7/00

CPC分类号： G06N7/005 ,  G06N5/003

摘要： Systems and methods for solving a constraint satisfaction problem (CSP) defined by one or more variables, constraints and probabilistic requests (PRs) are provided. In one embodiment, each PR is mapped onto a set of constraints that implement the PR. The CSP solver then finds a series of solutions to the CSP. For each solution, if a constraint associated with a PR is satisfied, then a success counter for that PR is incremented; else a failure counter for that PR is incremented. If the constraint was not considered for the purpose of solving the CSP, then the failure counter for the PR associated with the constraint is incremented.

摘要翻译： 提供了用于解决由一个或多个变量，约束和概率请求（PR）定义的约束满足问题（CSP）的系统和方法。 在一个实施例中，每个PR映射到实现PR的一组约束上。 CSP求解器然后找到CSP的一系列解决方案。 对于每个解决方案，如果满足与PR相关联的约束，则该PR的成功计数器递增; 否则PR的失败计数器增加。 如果为了解决CSP而不考虑约束，则与约束相关联的PR的故障计数器增加。

公开(公告)号：US20080177968A1

公开(公告)日：2008-07-24

申请号：US11625831

申请日：2007-01-23

申请人： Roy Emek ,  Itai Jaeger ,  Yoav Avraham Katz

发明人： Roy Emek ,  Itai Jaeger ,  Yoav Avraham Katz

IPC分类号： G06F12/02

CPC分类号： G06F17/5022

摘要： A computer-implemented method for verification of a hardware design includes specifying requests to allocate regions in a memory of the hardware design, such that at least two of the requests are specified independently of one another. The requests indicate respective allocation types.Overlap restrictions are specified between at least some of the allocation types. The requests and the overlap restrictions are automatically converted to a constraint satisfaction problem (CSP), which includes CSP constraints based on the requests, the allocation types and the overlap restrictions.The CSP is solved to produce a random test program, which includes a memory map that allocates the regions in the memory while complying with the requests and the overlap restrictions. The test program is applied to the hardware design.

摘要翻译： 用于验证硬件设计的计算机实现的方法包括指定在硬件设计的存储器中分配区域的请求，使得至少两个请求彼此独立地指定。 请求指示相应的分配类型。 在至少一些分配类型之间指定重叠限制。 请求和重叠限制自动转换为约束满足问题（CSP），其包括基于请求的CSP约束，分配类型和重叠限制。 CSP被解决以产生随机测试程序，其包括在遵守请求和重叠限制的情况下在存储器中分配区域的存储器映射。 测试程序适用于硬件设计。