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公开(公告)号：US06933789B2
公开(公告)日：2005-08-23
申请号：US10712596
申请日：2003-11-13
申请人： Alyosha C. Molnar , Rahul Magoon , Madhukar Reddy , Jackie Cheng
发明人： Alyosha C. Molnar , Rahul Magoon , Madhukar Reddy , Jackie Cheng
CPC分类号： H03L7/099
摘要： Embodiments of the invention provide techniques for calibrating voltage-controlled oscillators (VCOs). Multiple VCOs may be disposed on a chip with the VCOs having different frequency ranges. The VCOs may be selected and tested to determine a desired VCO to use to tune to a selected channel frequency. Each of the VCOs has multiple possible varactor configurations. The varactor configurations of the desired VCO determined to be used to tune to the selected channel frequency can be selected and tested to determine a desired varactor configuration for the desired VCO. The desired VCO with the desired varactor configuration will preferably be able to produce a full range of desired frequencies corresponding to all channel frequencies desired.
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公开(公告)号：US20050104665A1
公开(公告)日：2005-05-19
申请号：US10712596
申请日：2003-11-13
申请人： Alyosha Molnar , Rahul Magoon , Madhukar Reddy , Jackie Cheng
发明人： Alyosha Molnar , Rahul Magoon , Madhukar Reddy , Jackie Cheng
CPC分类号： H03L7/099
摘要： Embodiments of the invention provide techniques for calibrating voltage-controlled oscillators (VCOs). Multiple VCOs may be disposed on a chip with the VCOs having different frequency ranges. The VCOs may be selected and tested to determine a desired VCO to use to tune to a selected channel frequency. Each of the VCOs has multiple possible varactor configurations. The varactor configurations of the desired VCO determined to be used to tune to the selected channel frequency can be selected and tested to determine a desired varactor configuration for the desired VCO. The desired VCO with the desired varactor configuration will preferably be able to produce a full range of desired frequencies corresponding to all channel frequencies desired.
摘要翻译： 本发明的实施例提供了用于校准压控振荡器（VCO）的技术。 多个VCO可以设置在具有不同频率范围的VCO的芯片上。 可以选择和测试VCO以确定用于调谐到所选择的信道频率的期望的VCO。 每个VCO具有多个可能的变容二极管配置。 可以选择和测试确定用于调谐到所选频道频率的所需VCO的变容二极管配置，以确定所需VCO的期望变容二极管配置。 具有期望的变容二极管配置的期望的VCO将优选地能够产生对应于期望的所有信道频率的所需频率的全范围。
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公开(公告)号：US06671500B2
公开(公告)日：2003-12-30
申请号：US09823680
申请日：2001-03-30
IPC分类号： H04B104
CPC分类号： H03D7/163 , H03L7/185 , H03L7/1974 , H04B1/403
摘要： A system is disclosed for transmitting and receiving signals. The system includes the use of a frequency plan table a system for creating the frequency plan table. The frequency plan table relates carrier frequency channels to the operation of a synthesizer and a plurality of programmable frequency dividers in a locked loop. In a transmitter, a first programmable frequency divider accepts a reference signal and produces a comparison signal. A mixer accepts the reference signal and a transmission signal and produces a loop signal. A second programmable frequency divider accepts the loop signal and produces a loop signal having a divided intermediate frequency signal. A phase detector compares the comparison signal and the loop signal having a divided intermediate frequency and produces an output that controls a variable controlled oscillator. The variable controlled oscillator produces a modulated transmission signal.
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公开(公告)号：US06388543B1
公开(公告)日：2002-05-14
申请号：US09666501
申请日：2000-09-18
申请人： Alyosha C. Molnar , Rahul Magoon
发明人： Alyosha C. Molnar , Rahul Magoon
IPC分类号： H03H721
CPC分类号： H03H7/21
摘要： A system for an eight-phase 45° polyphase filter with amplitude matching, where a full eight-phase 45° split may be achieved by tying together the inputs of two offset four-phase 90° phase splitters. Amplitude matching may be achieved by obtaining those inputs from an additional single four-phase 90° phase splitter. The additional phase splitter can distribute power evenly among the inputs of the two offset phase splitters so as to cancel out the occurrence of any uneven power distribution.
摘要翻译： 用于具有幅度匹配的八相45多相滤波器的系统，其中可以通过将两个偏移的四相90相位分离器的输入相结合来实现完整的八相45分离。 幅度匹配可以通过从附加的单相四相90分相器中获得这些输入来实现。 附加分相器可以在两个偏移分相器的输入之间均匀分配功率，以抵消任何不均匀功率分布的发生
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公开(公告)号：US07218905B1
公开(公告)日：2007-05-15
申请号：US10172176
申请日：2002-06-14
IPC分类号： H04B1/06
CPC分类号： H04B1/109 , H03G3/3052
摘要： A receiver front end is provided with a low-noise amplifier (LNA), a linearity on demand (LOD) circuit, and a gain calibration device. The LOD circuit provides current to the LNA depending on linearity requirements. The gain calibration device monitors the amount of current provided by the LOD circuit to the LNA and provides signals to help compensate for variations in the LNA's gain due to the variations in the current supplied to the LNA by the LOD circuit. The compensation signals may be used to adjust the gain of a variable-gain amplifier, or may comprise compensation parameters usable by a digital signal processor, to compensate for the gain variations.
摘要翻译： 接收机前端设有低噪声放大器（LNA），线性点播（LOD）电路和增益校准装置。 LOD电路根据线性要求向LNA提供电流。 增益校准装置监视LOD电路向LNA提供的电流量，并提供信号，以帮助补偿由LOD电路提供给LNA的电流变化引起的LNA增益的变化。 补偿信号可以用于调整可变增益放大器的增益，或者可以包括由数字信号处理器使用的补偿参数，以补偿增益变化。
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公开(公告)号：US06810242B2
公开(公告)日：2004-10-26
申请号：US10261152
申请日：2002-09-30
IPC分类号： H04B126
CPC分类号： H03D7/1441 , H03D7/1433 , H03D7/1458 , H03D7/1475 , H03D7/165
摘要： A subharmonic mixer and a method of downconverting a received radio frequency signal is described. The subharmonic mixer of the present invention uses two stacks of switching cores with high order symmetry to reduce unwanted harmonic generation and uses transistors to improve headroom.
摘要翻译： 描述了次谐波混频器和下变频接收的射频信号的方法。 本发明的次谐波混频器使用具有高阶对称性的两个堆叠的开关磁芯来减少不必要的谐波产生并且使用晶体管来改善余量。
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公开(公告)号：US06766158B1
公开(公告)日：2004-07-20
申请号：US09823314
申请日：2001-03-30
IPC分类号： H04B126
CPC分类号： H03D7/163 , H03D2200/0086 , H04B1/28
摘要： A mixing system divides a local oscillator (“LO”) signal into two signals having a predetermined phase difference, mixes each of the two signal with an input signal to produce a mixed signal, and then combines the mixed signals to produce an output signal having substantially no third-order mixing products.
摘要翻译： 混合系统将本地振荡器（“LO”）信号分成具有预定相位差的两个信号，将两个信号中的每一个与输入信号混合以产生混合信号，然后组合混合信号以产生具有 基本上没有三阶混合产品。
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公开(公告)号：US06744328B2
公开(公告)日：2004-06-01
申请号：US10210698
申请日：2002-07-31
申请人： Rahul Magoon , Alyosha C. Molnar , Jeff Zachan
发明人： Rahul Magoon , Alyosha C. Molnar , Jeff Zachan
IPC分类号： H03B100
摘要： Systems for controlling the amplitude of the output signal of a controllable oscillator in a frequency synthesizer are provided. One such system provides a circuit having a controllable oscillator and an amplitude control circuit. The controllable oscillator is configured to generate an output signal having a predefined frequency and a predefined amplitude. The controllable oscillator is also configured with a plurality of operational states that are controlled by the amplitude control circuit. Each operational state of the controllable oscillator defines a particular current bias associated with a distinct amplitude of the output signal of the controllable oscillator. The amplitude control circuit receives the output signal of the controllable oscillator and determines the amplitude. When the amplitude of the output signal of the controllable oscillator is less than the predefined amplitude, the amplitude control circuit provides a control signal to the controllable oscillator. The control signal is configured to change the controllable oscillator to the operational state corresponding to the distinct amplitude that best approximates the predefined amplitude.
摘要翻译： 提供了用于控制频率合成器中的可控振荡器的输出信号的振幅的系统。 一种这样的系统提供具有可控振荡器和振幅控制电路的电路。 可控振荡器被配置为产生具有预定义频率和预定幅度的输出信号。 可控振荡器还配置有由幅度控制电路控制的多个操作状态。 可控振荡器的每个操作状态定义与可控振荡器的输出信号的不同幅度相关联的特定电流偏置。 振幅控制电路接收可控振荡器的输出信号并确定振幅。 当可控振荡器的输出信号的振幅小于预定幅度时，振幅控制电路向可控振荡器提供控制信号。 控制信号被配置为将可控振荡器改变到对应于最接近于预定幅度的不同幅度的操作状态。
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公开(公告)号：US06707326B1
公开(公告)日：2004-03-16
申请号：US09370099
申请日：1999-08-06
申请人： Rahul Magoon , Alyosha C. Molnar
发明人： Rahul Magoon , Alyosha C. Molnar
IPC分类号： H03K2100
CPC分类号： G06F7/68 , H03K21/08 , H03K21/10 , H03K23/544 , H03K23/667
摘要： A programmable frequency divider capable of a 50% duty cycle at odd and even integer division ratios. In one embodiment, the frequency divider is configured to produce an output signal having a period equal to a division ratio N times a period of a clock signal, and the division number N is a programmable variable which bears the following relationship to the number F of required storage elements: F = N + P 2 , where P is 1 if the division ratio is odd, and 0 if the division ratio is even.
摘要翻译： 一个可编程分频器，能够以奇数和偶数整数分频比占空比为50％。 在一个实施例中，分频器被配置为产生具有等于时钟信号的周期的N倍的分频比的周期的输出信号，并且分频数N是可编程的变量，该可编程变量与 所需的存储元素：如果分频比为奇数，其中P为1，如果分频比为偶数，则为0。
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公开(公告)号：US06535725B2
公开(公告)日：2003-03-18
申请号：US09823313
申请日：2001-03-30
IPC分类号： H04B110
CPC分类号： H04B1/30 , H03D7/1433 , H03D7/1458 , H03D2200/0047 , H03D2200/009
摘要： The DC offset compensator compensates DC offsets resulting from interferor self mixing and interferor interaction with even-order nonlinearities. In one embodiment, the DC offset compensator resides in a mobile communication device. A radio frequency (RF) communication signal is mixed with a local oscillator signal (LO) in a direct conversion mixer. The communication signal, at certain times, will have both a communication signal of interest and interferor signals. The interferor signals induce signals in other portions of the mixer circuit, called interferor leakage signals, and the interaction between the two signals causes undesirable DC offsets in the mixer output. The DC offset compensator detects the presence of the interferor signals and provides a compensating signal to the output of the mixer such that the undesirable DC offset signals caused by the interferer self mixing and interferor interaction with even order-nonlinearities in the mixer are compensated out of the mixer output signal.
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