On-chip VCO calibration
    1.
    发明申请
    On-chip VCO calibration 有权
    片内VCO校准

    公开(公告)号:US20050104665A1

    公开(公告)日:2005-05-19

    申请号:US10712596

    申请日:2003-11-13

    IPC分类号: H03L7/099 H03L7/00

    CPC分类号: H03L7/099

    摘要: Embodiments of the invention provide techniques for calibrating voltage-controlled oscillators (VCOs). Multiple VCOs may be disposed on a chip with the VCOs having different frequency ranges. The VCOs may be selected and tested to determine a desired VCO to use to tune to a selected channel frequency. Each of the VCOs has multiple possible varactor configurations. The varactor configurations of the desired VCO determined to be used to tune to the selected channel frequency can be selected and tested to determine a desired varactor configuration for the desired VCO. The desired VCO with the desired varactor configuration will preferably be able to produce a full range of desired frequencies corresponding to all channel frequencies desired.

    摘要翻译: 本发明的实施例提供了用于校准压控振荡器(VCO)的技术。 多个VCO可以设置在具有不同频率范围的VCO的芯片上。 可以选择和测试VCO以确定用于调谐到所选择的信道频率的期望的VCO。 每个VCO具有多个可能的变容二极管配置。 可以选择和测试确定用于调谐到所选频道频率的所需VCO的变容二极管配置,以确定所需VCO的期望变容二极管配置。 具有期望的变容二极管配置的期望的VCO将优选地能够产生对应于期望的所有信道频率的所需频率的全范围。

    On-chip VCO calibration
    2.
    发明授权

    公开(公告)号:US06933789B2

    公开(公告)日:2005-08-23

    申请号:US10712596

    申请日:2003-11-13

    IPC分类号: H03L7/099 H03L7/00 H03B27/00

    CPC分类号: H03L7/099

    摘要: Embodiments of the invention provide techniques for calibrating voltage-controlled oscillators (VCOs). Multiple VCOs may be disposed on a chip with the VCOs having different frequency ranges. The VCOs may be selected and tested to determine a desired VCO to use to tune to a selected channel frequency. Each of the VCOs has multiple possible varactor configurations. The varactor configurations of the desired VCO determined to be used to tune to the selected channel frequency can be selected and tested to determine a desired varactor configuration for the desired VCO. The desired VCO with the desired varactor configuration will preferably be able to produce a full range of desired frequencies corresponding to all channel frequencies desired.

    High Dynamic Range Time-Varying Integrated Receiver for Elimination of Off-Chip Filters
    3.
    发明申请
    High Dynamic Range Time-Varying Integrated Receiver for Elimination of Off-Chip Filters 有权
    高动态范围时变集成接收器,用于消除片外滤波器

    公开(公告)号:US20090131007A1

    公开(公告)日:2009-05-21

    申请号:US12325821

    申请日:2008-12-01

    IPC分类号: H04B1/26

    摘要: A receiver circuit comprising a quadrature passive mixer having an input and an output, and an input impedance of the quadrature passive mixer provides a band-pass response. One or more output impedances coupled to the output of the quadrature passive mixer. A low noise amplifier (LNA) having an input and an output coupled to the quadrature passive mixer, the LNA configured to provide substantially linear transconductance over a predetermined input range.

    摘要翻译: 包括具有输入和输出的正交无源混频器和正交无源混频器的输入阻抗的接收机电路提供带通响应。 耦合到正交无源混频器的输出的一个或多个输出阻抗。 具有耦合到所述正交无源混频器的输入和输出的低噪声放大器(LNA),所述LNA被配置为在预定输入范围上提供基本上的线性跨导。

    High Dynamic Range Time-Varying Integrated Receiver for Elimination of Off-Chip Filters
    4.
    发明申请
    High Dynamic Range Time-Varying Integrated Receiver for Elimination of Off-Chip Filters 有权
    高动态范围时变集成接收器,用于消除片外滤波器

    公开(公告)号:US20120196554A1

    公开(公告)日:2012-08-02

    申请号:US13425237

    申请日:2012-03-20

    IPC分类号: H04B1/16

    摘要: A receiver circuit includes a quadrature passive mixer, a first charge load, and a second charge load. The quadrature passive mixer has a differential input for receiving a differential input signal, and arranged for mixing the differential input signal with a quadrature local oscillator (LO) signal. The quadrature passive mixer has an in-phase mixer with a differential in-phase output, and a quadrature-phase mixer with a differential quadrature-phase output. The first and second charge loads are coupled to differential in-phase output and differential quadrature-phase output, respectively. In every quarter cycle of the quadrature LO signal, the differential in-phase output and the differential quadrature-phase output are arranged to be not shorted so as to avoid charging sharing between the first charge load and the second charge load, or are arranged to be shorted to cause charging sharing between the first charge load and the second charge load that generates a leakage path.

    摘要翻译: 接收器电路包括正交无源混频器,第一充电负载和第二充电负载。 正交无源混频器具有用于接收差分输入信号的差分输入,并且被配置为将差分输入信号与正交本地振荡器(LO)信号进行混频。 正交无源混频器具有差分同相输出的同相混频器和具有差分正交相输出的正交混频器。 第一和第二充电负载分别耦合到差分同相输出和差分正交相输出。 在正交LO信号的每四分之一周期中,差分同相输出和差分正交相输出被布置为不短路,以避免第一充电负载和第二充电负载之间的充电共享,或者被布置为 短路以引起第一充电负载和产生泄漏路径的第二充电负载之间的充电共享。

    High dynamic range time-varying integrated receiver for elimination of off-chip filters
    5.
    发明授权
    High dynamic range time-varying integrated receiver for elimination of off-chip filters 有权
    高动态范围时变集成接收器,用于消除片外滤波器

    公开(公告)号:US07885620B2

    公开(公告)日:2011-02-08

    申请号:US12325821

    申请日:2008-12-01

    IPC分类号: H04B1/26 H04B15/00

    摘要: A receiver circuit comprising a quadrature passive mixer having an input and an output, and an input impedance of the quadrature passive mixer provides a band-pass response. One or more output impedances coupled to the output of the quadrature passive mixer. A low noise amplifier (LNA) having an input and an output coupled to the quadrature passive mixer, the LNA configured to provide substantially linear transconductance over a predetermined input range.

    摘要翻译: 包括具有输入和输出的正交无源混频器和正交无源混频器的输入阻抗的接收机电路提供带通响应。 耦合到正交无源混频器的输出的一个或多个输出阻抗。 具有耦合到所述正交无源混频器的输入和输出的低噪声放大器(LNA),所述LNA被配置为在预定输入范围上提供基本上线性的跨导。

    High dynamic range time-varying integrated receiver for elimination of off-chip filters
    6.
    发明授权
    High dynamic range time-varying integrated receiver for elimination of off-chip filters 有权
    高动态范围时变集成接收器,用于消除片外滤波器

    公开(公告)号:US08577323B2

    公开(公告)日:2013-11-05

    申请号:US13425237

    申请日:2012-03-20

    IPC分类号: H04B1/26 H04B15/00

    摘要: A receiver circuit includes a quadrature passive mixer, a first charge load, and a second charge load. The quadrature passive mixer has a differential input for receiving a differential input signal, and arranged for mixing the differential input signal with a quadrature local oscillator (LO) signal. The quadrature passive mixer has an in-phase mixer with a differential in-phase output, and a quadrature-phase mixer with a differential quadrature-phase output. The first and second charge loads are coupled to differential in-phase output and differential quadrature-phase output, respectively. In every quarter cycle of the quadrature LO signal, the differential in-phase output and the differential quadrature-phase output are arranged to be not shorted so as to avoid charging sharing between the first charge load and the second charge load, or are arranged to be shorted to cause charging sharing between the first charge load and the second charge load that generates a leakage path.

    摘要翻译: 接收器电路包括正交无源混频器,第一充电负载和第二充电负载。 正交无源混频器具有用于接收差分输入信号的差分输入,并且被配置为将差分输入信号与正交本地振荡器(LO)信号进行混频。 正交无源混频器具有差分同相输出的同相混频器和具有差分正交相输出的正交混频器。 第一和第二充电负载分别耦合到差分同相输出和差分正交相输出。 在正交LO信号的每四分之一周期中,差分同相输出和差分正交相输出被布置为不短路,以避免第一充电负载和第二充电负载之间的充电共享,或者被布置为 短路以引起第一充电负载和产生泄漏路径的第二充电负载之间的充电共享。

    High dynamic range time-varying integrated receiver for elimination of off-chip filters
    7.
    发明授权
    High dynamic range time-varying integrated receiver for elimination of off-chip filters 有权
    高动态范围时变集成接收器,用于消除片外滤波器

    公开(公告)号:US08165556B2

    公开(公告)日:2012-04-24

    申请号:US12978850

    申请日:2010-12-27

    IPC分类号: H04B1/26 H04B15/00 H04B1/28

    摘要: A receiver circuit includes an amplifier, an output impedance, and a mixer. The amplifier is arranged to generate an amplifier output. The mixer has an input and an output respectively coupled to the amplifier and the output impedance. The output impedance sets frequency selectivity provided at the input of the mixer, and the mixer is arranged to down-convert a signal derived from the amplifier output and accordingly generate a down-converted signal at the output of the mixer for further signal processing.

    摘要翻译: 接收器电路包括放大器,输出阻抗和混频器。 放大器被布置成产生放大器输出。 混频器具有分别耦合到放大器和输出阻抗的输入和输出。 输出阻抗设置在混频器的输入处提供的频率选择性,并且混频器被布置为对从放大器输出导出的信号进行下变频,并因此在混频器的输出处产生下变频信号以用于进一步的信号处理。

    Method and apparatus for multiple phase splitting for dual band IQ subharmonic mixer
    8.
    发明授权
    Method and apparatus for multiple phase splitting for dual band IQ subharmonic mixer 有权
    双频带IQ谐波混频器的多相分离方法和装置

    公开(公告)号:US06658066B1

    公开(公告)日:2003-12-02

    申请号:US09506302

    申请日:2000-02-17

    IPC分类号: H04L2736

    CPC分类号: H03C3/40

    摘要: A method and apparatus are provided for generating first and second modulation signals from a local oscillator signal for quadrature subharmonic modulation of a quadrature amplitude modulated information signal. The method includes the steps of delaying the local oscillator signal in a plurality of incremental odd and even delay steps to form respective sets of odd and even modulator signals, said odd set of modulator signals together forming the first modulation signal and said even set forming the second modulation signal for quadrature subharmonic modulation of the quadrature amplitude modulated information signal and controlling a magnitude of the incremental delays based upon a predetermined phase offset between the local oscillator signal and a last delay step of the incremental delay steps.

    摘要翻译: 提供了一种用于从本地振荡器信号产生用于正交幅度调制信息信号的正交次谐波调制的第一和第二调制信号的方法和装置。 该方法包括以多个增量奇数和偶数延迟步长延迟本地振荡器信号以形成相应的奇数和偶数调制器信号集合的步骤,所述奇数组调制器信号一起形成第一调制信号,并且所述偶数集合形成 第二调制信号,用于正交调幅信号信号的正交次谐波调制,并且基于本地振荡器信号与增量延迟步骤的最后延迟步长之间的预定相位偏移来控制增量延迟的幅度。

    High Dynamic Range Time-Varying Integrated Receiver for Elimination of Off-Chip Filters
    9.
    发明申请
    High Dynamic Range Time-Varying Integrated Receiver for Elimination of Off-Chip Filters 有权
    高动态范围时变集成接收器,用于消除片外滤波器

    公开(公告)号:US20110092176A1

    公开(公告)日:2011-04-21

    申请号:US12978850

    申请日:2010-12-27

    IPC分类号: H04B1/26

    摘要: A receiver circuit includes an amplifier, an output impedance, and a mixer. The amplifier is arranged to generate an amplifier output. The mixer has an input and an output respectively coupled to the amplifier and the output impedance. The output impedance sets frequency selectivity provided at the input of the mixer, and the mixer is arranged to down-convert a signal derived from the amplifier output and accordingly generate a down-converted signal at the output of the mixer for further signal processing.

    摘要翻译: 接收器电路包括放大器,输出阻抗和混频器。 放大器被布置成产生放大器输出。 混频器具有分别耦合到放大器和输出阻抗的输入和输出。 输出阻抗设置在混频器的输入处提供的频率选择性,并且混频器被布置为对从放大器输出导出的信号进行下变频,并因此在混频器的输出处产生下变频信号以用于进一步的信号处理。

    High dynamic range time-varying integrated receiver for elimination of off-chip filters
    10.
    发明授权
    High dynamic range time-varying integrated receiver for elimination of off-chip filters 有权
    高动态范围时变集成接收器,用于消除片外滤波器

    公开(公告)号:US07460844B2

    公开(公告)日:2008-12-02

    申请号:US11046023

    申请日:2005-01-28

    IPC分类号: H04B1/26 H04B1/28

    摘要: A quadrature mixer with an LO input is provided. The quadrature mixer receives a signal having a frequency FLO and a signal input having a frequency FSIG, and has an output that comprises an output impedance that is high at frequencies of |FLO−FSIG | and |FLO+FSIG| and low at other. A mixer coupled to the output impedance interacts with the output impedance such that an impedance presented at the signal input is high for signals at FSIG if FSIG is a predetermined signal frequency, and low at other frequencies.

    摘要翻译: 提供具有LO输入的正交混频器。 正交混频器接收具有频率FLO和具有频率FSIG的信号输入的信号,并且具有包括在| FLO-FSIG |的频率下高的输出阻抗的输出。 和| FLO + FSIG | 低于其他。 耦合到输出阻抗的混频器与输出阻抗相互作用,使得如果FSIG是预定的信号频率,则在FSIG处的信号在信号输入处呈现的阻抗较高,并且在其它频率处低。