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    Hybrid hardware and software reporting management
    1.
    发明授权
    Hybrid hardware and software reporting management 有权

    公开(公告)号：US10360092B1

    公开(公告)日：2019-07-23

    申请号：US15597987

    申请日：2017-05-17

    Applicant: Amazon Technologies, Inc.

    Inventor： Hani Ayoub ,  Adi Habusha ,  Itay Poleg

    IPC: G06F11/07 ,  H03M13/00

    Abstract: A hybrid approach using hardware and software is used for report management in peripheral component interconnect (PCI) express devices. The device hardware detects an error associated with a transaction with a host computer. The device software identifies a function associated with the error and determines various attributes of the error. The device software then exposes the attributes of the error in the PCI express and the advanced error reporting (AER) capabilities. The error can be reported in a message transaction to the host computer.

    SYMMETRIC COMMUNICATION FOR ASYMMETRIC ENVIRONMENTS
    3.
    发明公开
    SYMMETRIC COMMUNICATION FOR ASYMMETRIC ENVIRONMENTS 审中-公开

    公开(公告)号：US20240171662A1

    公开(公告)日：2024-05-23

    申请号：US18427670

    申请日：2024-01-30

    Applicant: Amazon Technologies, Inc.

    Inventor： Saleh Abd-Alhaleem ,  Leah Shalev ,  Hani Ayoub ,  Avigdor Segal

    IPC: H04L69/22 ,  H04L67/14

    CPC classification number: H04L69/22 ,  H04L67/14

    Abstract: Communication in an asymmetric multiengine system is handled using engine routing tables defining subsets of engines to control engine-to-engine connection mapping. Local devices perform an engine selection process that includes selecting an engine routing table based on a number of remote engines in a remote device and selecting an engine set from the selected table based on an identifier of the remote device. A connection to the remote device is created using the engines identified in the selected engine set.

    Device full memory access through standard PCI express bus
    4.
    发明授权
    Device full memory access through standard PCI express bus 有权

    公开(公告)号：US09804988B1

    公开(公告)日：2017-10-31

    申请号：US14928990

    申请日：2015-10-30

    Applicant: Amazon Technologies, Inc.

    Inventor： Hani Ayoub ,  Adi Habusha ,  Ronen Shitrit

    IPC: G06F13/40 ,  G06F13/42 ,  G06F13/28

    CPC classification number: G06F13/4022 ,  G06F13/28 ,  G06F13/404 ,  G06F13/4282 ,  G06F2213/0024 ,  G06F2213/0026

    Abstract: A method of transferring data between a host and a PCI device is disclosed. The method comprises mapping a fixed memory-mapping control block in a host memory of the host to a control register of a memory-mapping unit of the PCI device; mapping a dynamic data-access memory block in the host memory to a default memory block in a memory of the PCI device, wherein the memory-mapping unit translates an address between the dynamic data-access memory block and a memory block in the memory of the PCI device; and dynamically modifying a value in the control register of the memory-mapping unit through the fixed memory-mapping control block such that an address of the dynamic data-access memory block in the host memory is translated to a different address in the memory of the PCI device based on the modified value in the control register of the memory-mapping unit.

    Multi-port load balancing using transport protocol
    5.
    发明授权
    Multi-port load balancing using transport protocol 有权

    公开(公告)号：US12301460B1

    公开(公告)日：2025-05-13

    申请号：US17937019

    申请日：2022-09-30

    Applicant: Amazon Technologies, Inc.

    Inventor： Hani Ayoub ,  Leah Shalev ,  Talor Kovary

    IPC: H04L47/125 ,  H04L43/10 ,  H04L45/74

    Abstract: A different network address is assigned to each port of a first device and a second device that are configured to exchange traffic over a multi-path connection of a transport layer protocol. When a timeout is detected by the first device indicating that a packet sent to a first network address assigned to a first port of the second device was not received, the first device can regenerate the packet with a second network address assigned to a second port of the second device, and send the regenerated packet to the second network address of the second device. The first device can send heartbeat packets to the first port in an exponential backoff manner and, upon receiving a heartbeat acknowledgement from the first port, resume sending the packets to the first port.

    Device full memory access through standard PCI express bus
    6.
    发明授权
    Device full memory access through standard PCI express bus 有权

    公开(公告)号：US10241951B1

    公开(公告)日：2019-03-26

    申请号：US15796630

    申请日：2017-10-27

    Applicant: Amazon Technologies, Inc.

    Inventor： Hani Ayoub ,  Adi Habusha ,  Ronen Shitrit

    IPC: G06F3/06 ,  G06F13/28 ,  G06F13/40 ,  G06F13/42

    Abstract: A method of transferring data between a host and a PCI device is disclosed. The method comprises mapping a fixed memory-mapping control block in a host memory of the host to a control register of a memory-mapping unit of the PCI device; mapping a dynamic data-access memory block in the host memory to a default memory block in a memory of the PCI device, wherein the memory-mapping unit translates an address between the dynamic data-access memory block and a memory block in the memory of the PCI device; and dynamically modifying a value in the control register of the memory-mapping unit through the fixed memory-mapping control block such that an address of the dynamic data-access memory block in the host memory is translated to a different address in the memory of the PCI device based on the modified value in the control register of the memory-mapping unit.

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