公开(公告)号：US20170070192A1

公开(公告)日：2017-03-09

申请号：US15143951

申请日：2016-05-02

申请人： Analog Devices, Inc.

发明人： Andrey Martchovsky ,  Roger Van Brunt

IPC分类号： H03B1/04 ,  H03L7/18 ,  H03L7/099 ,  H03L7/089 ,  H03B5/04 ,  H03B5/12

CPC分类号： H03B1/04 ,  H03B5/04 ,  H03B5/1212 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1243 ,  H03B2200/009 ,  H03L7/0891 ,  H03L7/093 ,  H03L7/099 ,  H03L7/18

摘要： Provided herein are apparatus and methods for reducing supply noise conversion to phase noise. In certain configurations, voltage controlled elements such as varactors are used to control a VCO output frequency. A VCO transfer function relating supply voltage noise to a common node of a varactor gives rise to a transfer function of value a representing a push coefficient. An intentional amount of supply noise can be added to a tuning voltage by injecting it at a tuning port of the VCO. By splitting an integration capacitance in a loop filter, an integration capacitance can be divided among a capacitor divider to create a transfer function of value β representing a compensating coefficient. The injected noise from the capacitor divider can reduce VCO pushing by canceling the value α. When the value β is set equal to the value α, the VCO pushing can be reduced to within the estimation or measurement accuracy of the value α.

摘要翻译： 本文提供了用于将电源噪声转换降为相位噪声的装置和方法。 在某些配置中，使用诸如变容二极管的电压控制元件来控制VCO输出频率。 将电源电压噪声与变容二极管的公共节点相关联的VCO传递函数产生表示推力系数的值a的传递函数。 可以通过将其注入VCO的调谐端口将有意量的电源噪声添加到调谐电压。 通过在环路滤波器中分离积分电容，积分电容可以分为电容分压器，以产生表示补偿系数的值β的传递函数。 来自电容分压器的注入噪声可以通过消除值α来减小VCO推送。 当将值β设定为等于值α时，可以将VCO按压减小到值α的估计或测量精度。

公开(公告)号：US09838026B2

公开(公告)日：2017-12-05

申请号：US15270751

申请日：2016-09-20

申请人： ANALOG DEVICES, INC.

发明人： Roger Van Brunt ,  Stefan Jones

IPC分类号： H03L7/06 ,  H03L7/197 ,  H03L7/091 ,  H03L7/093 ,  H03L7/099

CPC分类号： H03L7/1974 ,  H03L7/085 ,  H03L7/091 ,  H03L7/093 ,  H03L7/099 ,  H03L7/1976

摘要： Apparatus and methods for fractional-N synthesizer phase-locked loops with multi-phase oscillators are provided. In certain configurations, a fractional-N PLL includes a time-to-digital converter (TDC), a digital loop filter, a multi-phase oscillator, and fractional division circuitry. The multi-phase oscillator includes multiple taps used to generate multiple clock signal phases that are provided to the fractional division circuitry to reduce the fractional-N PLL's quantization error. The fractional division circuitry includes a tap error correction circuit for compensating for errors in tap positions of the multi-phase oscillator. By including the tap error correction circuit, the phase noise and/or jitter performance of the fractional-N PLL can be enhanced.

公开(公告)号：US20170093412A1

公开(公告)日：2017-03-30

申请号：US15270751

申请日：2016-09-20

申请人： ANALOG DEVICES, INC.

发明人： Roger Van Brunt ,  Stefan Jones

IPC分类号： H03L7/197 ,  H03L7/093 ,  H03L7/099 ,  H03L7/091

CPC分类号： H03L7/1974 ,  H03L7/085 ,  H03L7/091 ,  H03L7/093 ,  H03L7/099 ,  H03L7/1976

摘要： Apparatus and methods for fractional-N synthesizer phase-locked loops with multi-phase oscillators are provided. In certain configurations, a fractional-N PLL includes a time-to-digital converter (TDC), a digital loop filter, a multi-phase oscillator, and fractional division circuitry. The multi-phase oscillator includes multiple taps used to generate multiple clock signal phases that are provided to the fractional division circuitry to reduce the fractional-N PLL's quantization error. The fractional division circuitry includes a tap error correction circuit for compensating for errors in tap positions of the multi-phase oscillator. By including the tap error correction circuit, the phase noise and/or jitter performance of the fractional-N PLL can be enhanced.