公开(公告)号：US09465754B2

公开(公告)日：2016-10-11

申请号：US13930088

申请日：2013-06-28

Applicant: Analog Devices, Inc.

Inventor： Alexander Leonard ,  Shipra Bhal ,  Christopher Mayer

IPC: G06F13/16

CPC classification number: G06F13/1642 ,  G06F13/1673

Abstract: A circuit may include a queue, a monitor, and a controller. The queue may receive and store a plurality of commands from a plurality of buses to access a shared set of registers. The monitor may monitor the plurality of commands in the queue to determine whether a period of time needs to be reserved for selected commands from one of the plurality of buses. The controller, if the period of time needs to be reserved, based on the period of time determined by the monitor, may disable acceptance of commands from buses other than the one of the plurality of buses, may execute the selected commands for the one of the plurality of buses, and may allow more than one of the plurality of buses access to results of the selected commands.

Abstract translation: 电路可以包括队列，监视器和控制器。 队列可以从多个总线接收并存储多个命令以访问共享的一组寄存器。 监视器可以监视队列中的多个命令，以确定是否需要为多个总线中的一个总线的选定命令保留一段时间。 控制器，如果需要保留的时间段，基于由监视器确定的时间段，可以禁止从除了多个总线之一的总线以外的总线接收命令，可以执行所选择的命令 多个总线，并且可以允许多个总线中的多于一个访问所选择的命令的结果。

公开(公告)号：US20220374389A1

公开(公告)日：2022-11-24

申请号：US17817811

申请日：2022-08-05

Applicant: Analog Devices, Inc.

Inventor： Manish J. Manglani ,  Shipra Bhal ,  Christopher Mayer

IPC: G06F15/80 ,  G06F9/38

Abstract: This disclosure relates to a distributed processing system for configuring multiple processing channels. The distributed processing system includes a main processor, such as an ARM processor, communicatively coupled to a plurality of co-processors, such as stream processors. The co-processors can execute instructions in parallel with each other and interrupt the ARM processor. Longer latency instructions can be executed by the main processor and lower latency instructions can be executed by the co-processors. There are several ways that a stream can be triggered in the distributed processing system. In an embodiment, the distributed processing system is a stream processor system that includes an ARM processor and stream processors configured to access different register sets. The stream processors can include a main stream processor and stream processors in respective transmit and receive channels. The stream processor system can be implemented in a radio system to configure the radio for operation.

公开(公告)号：US20190303348A1

公开(公告)日：2019-10-03

申请号：US16103711

申请日：2018-08-14

Applicant: Analog Devices, Inc.

Inventor： Manish J. Manglani ,  Shipra Bhal ,  Christopher Mayer

IPC: G06F15/82 ,  G06F9/30 ,  G06F13/24

Abstract: This disclosure relates to a distributed processing system for configuring multiple processing channels. The distributed processing system includes a main processor, such as an ARM processor, communicatively coupled to a plurality of co-processors, such as stream processors. The co-processors can execute instructions in parallel with each other and interrupt the ARM processor. Longer latency instructions can be executed by the main processor and lower latency instructions can be executed by the co-processors. There are several ways that a stream can be triggered in the distributed processing system. In an embodiment, the distributed processing system is a stream processor system that includes an ARM processor and stream processors configured to access different register sets. The stream processors can include a main stream processor and stream processors in respective transmit and receive channels. The stream processor system can be implemented in a radio system to configure the radio for operation.

公开(公告)号：US11422969B2

公开(公告)日：2022-08-23

申请号：US16913251

申请日：2020-06-26

Applicant: Analog Devices, Inc.

Inventor： Manish J. Manglani ,  Shipra Bhal ,  Christopher Mayer

IPC: G06F9/30 ,  G06F15/82 ,  G06F13/24 ,  G06F9/38

Abstract: This disclosure relates to a distributed processing system for configuring multiple processing channels. The distributed processing system includes a main processor, such as an ARM processor, communicatively coupled to a plurality of co-processors, such as stream processors. The co-processors can execute instructions in parallel with each other and interrupt the ARM processor. Longer latency instructions can be executed by the main processor and lower latency instructions can be executed by the co-processors. There are several ways that a stream can be triggered in the distributed processing system. In an embodiment, the distributed processing system is a stream processor system that includes an ARM processor and stream processors configured to access different register sets. The stream processors can include a main stream processor and stream processors in respective transmit and receive channels. The stream processor system can be implemented in a radio system to configure the radio for operation.

公开(公告)号：US11907160B2

公开(公告)日：2024-02-20

申请号：US17817811

申请日：2022-08-05

Applicant: Analog Devices, Inc.

Inventor： Manish J. Manglani ,  Shipra Bhal ,  Christopher Mayer

IPC: G06F9/30 ,  G06F15/82 ,  G06F13/24 ,  G06F9/38 ,  G06F15/80

CPC classification number: G06F15/82 ,  G06F9/30123 ,  G06F9/3877 ,  G06F13/24 ,  G06F15/80

Abstract: This disclosure relates to a distributed processing system for configuring multiple processing channels. The distributed processing system includes a main processor, such as an ARM processor, communicatively coupled to a plurality of co-processors, such as stream processors. The co-processors can execute instructions in parallel with each other and interrupt the ARM processor. Longer latency instructions can be executed by the main processor and lower latency instructions can be executed by the co-processors. There are several ways that a stream can be triggered in the distributed processing system. In an embodiment, the distributed processing system is a stream processor system that includes an ARM processor and stream processors configured to access different register sets. The stream processors can include a main stream processor and stream processors in respective transmit and receive channels. The stream processor system can be implemented in a radio system to configure the radio for operation.

公开(公告)号：US20200327095A1

公开(公告)日：2020-10-15

申请号：US16913251

申请日：2020-06-26

Applicant: Analog Devices, Inc.

Inventor： Manish J. Manglani ,  Shipra Bhal ,  Christopher Mayer

IPC: G06F15/82 ,  G06F13/24 ,  G06F9/30

Abstract: This disclosure relates to a distributed processing system for configuring multiple processing channels. The distributed processing system includes a main processor, such as an ARM processor, communicatively coupled to a plurality of co-processors, such as stream processors. The co-processors can execute instructions in parallel with each other and interrupt the ARM processor. Longer latency instructions can be executed by the main processor and lower latency instructions can be executed by the co-processors. There are several ways that a stream can be triggered in the distributed processing system. In an embodiment, the distributed processing system is a stream processor system that includes an ARM processor and stream processors configured to access different register sets. The stream processors can include a main stream processor and stream processors in respective transmit and receive channels. The stream processor system can be implemented in a radio system to configure the radio for operation.

公开(公告)号：US10733141B2

公开(公告)日：2020-08-04

申请号：US16103711

申请日：2018-08-14

Applicant: Analog Devices, Inc.

Inventor： Manish J. Manglani ,  Shipra Bhal ,  Christopher Mayer

IPC: G06F9/30 ,  G06F15/82 ,  G06F13/24

Abstract: This disclosure relates to a distributed processing system for configuring multiple processing channels. The distributed processing system includes a main processor, such as an ARM processor, communicatively coupled to a plurality of co-processors, such as stream processors. The co-processors can execute instructions in parallel with each other and interrupt the ARM processor. Longer latency instructions can be executed by the main processor and lower latency instructions can be executed by the co-processors. There are several ways that a stream can be triggered in the distributed processing system. In an embodiment, the distributed processing system is a stream processor system that includes an ARM processor and stream processors configured to access different register sets. The stream processors can include a main stream processor and stream processors in respective transmit and receive channels. The stream processor system can be implemented in a radio system to configure the radio for operation.