Thin film transistors
    1.
    发明授权
    Thin film transistors 有权
    薄膜晶体管

    公开(公告)号:US06232157B1

    公开(公告)日:2001-05-15

    申请号:US09450522

    申请日:1999-11-29

    IPC分类号: H01L2100

    摘要: The specification describes thin film transistor integrated circuits wherein the TFT devices are field effect transistors with inverted structures. The interconnect levels are produced prior to the formation of the transistors. This structure leads to added flexibility in processing. The inverted structure is a result of removing the constraints in traditional semiconductor field effect device manufacture that are imposed by the necessity of starting the device fabrication with the single crystal semiconductor active material. In the inverted structure the active material, preferably an organic semiconductor, is formed last in the fabrication sequence. In a preferred embodiment the inverted TFT devices are formed on a flexible printed circuit substrate.

    摘要翻译: 该说明书描述了薄膜晶体管集成电路,其中TFT器件是具有倒置结构的场效应晶体管。 在形成晶体管之前产生互连电平。 这种结构导致加工的灵活性增加。 反转结构是消除传统的半导体场效应器件制造中由于采用单晶半导体活性材料开始器件制造的必要性而产生的限制的结果。 在倒置结构中,最终在制造顺序中形成活性材料,优选有机半导体。 在优选实施例中,反向TFT器件形成在柔性印刷电路衬底上。

    SEMICONDUCTOR DIODE ASSEMBLY
    2.
    发明申请
    SEMICONDUCTOR DIODE ASSEMBLY 有权
    半导体二极管总成

    公开(公告)号:US20150206985A1

    公开(公告)日:2015-07-23

    申请号:US14672867

    申请日:2015-03-30

    摘要: TSV devices with p-n junctions that are planar have superior performance in breakdown and current handling. Junction diode assembly formed in enclosed trenches occupies less chip area compared with junction-isolation diode assembly in the known art. Diode assembly fabricated with trenches formed after the junction formation reduces fabrication cost and masking steps increase process flexibility and enable asymmetrical TSV and uni-directional TSV functions.

    摘要翻译: 具有p-n结平面的TSV器件在击穿和当前处理方面具有优异的性能。 形成在封闭沟槽中的结二极管组件与已知技术中的结隔离二极管组件相比占据较少的芯片面积。 在结形成之后形成的沟槽制造的二极管组件降低了制造成本,并且掩蔽步骤增加了工艺灵活性并且使得不对称TSV和单向TSV功能成为可能。

    Thermal annealing for preventing polycide void
    3.
    发明授权
    Thermal annealing for preventing polycide void 失效
    用于防止聚合物空隙的热退火

    公开(公告)号:US6040238A

    公开(公告)日:2000-03-21

    申请号:US4190

    申请日:1998-01-08

    CPC分类号: H01L29/6659 H01L21/28061

    摘要: A method for fabricating polycide gate electrodes wherein voids at the silicide/polysilicon interface are eliminated by thermal annealing is described. A layer of gate silicon oxide is grown over the surface of a semiconductor substrate. A polysilicon layer is deposited overlying the gate silicon oxide layer. A silicide layer is formed overlying the polysilicon layer. The semiconductor substrate is annealed by rapid thermal annealing (RTA). Thereafter, an oxide layer is deposited overlying the silicide layer. Because the silicide layer has been annealed, silicon atoms are prevented from diffusing into the silicide layer and forming voids in the polysilicon layer. The silicide, polysilicon and gate silicon oxide layers are patterned to complete fabrication of a gate electrode in the manufacture of an integrated circuit device.

    摘要翻译: 描述了通过热退火消除硅化物/多晶硅界面处的空隙的多晶硅栅电极的制造方法。 在半导体衬底的表面上生长一层栅极氧化硅。 沉积覆盖栅氧化硅层的多晶硅层。 在多晶硅层上形成硅化物层。 半导体衬底通过快速热退火(RTA)退火。 此后,在硅化物层上沉积氧化物层。 由于硅化物层已被退火,硅原子被阻止扩散到硅化物层中并在多晶硅层中形成空隙。 图案化硅化物,多晶硅和栅极氧化硅层,以在集成电路器件的制造中完成栅电极的制造。