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    Method and system for caching address translations from multiple address spaces in virtual machines
    5.
    发明申请
    Method and system for caching address translations from multiple address spaces in virtual machines 有权
    用于从虚拟机中的多个地址空间缓存地址转换的方法和系统

    公开(公告)号：US20060259734A1

    公开(公告)日：2006-11-16

    申请号：US11128982

    申请日：2005-05-13

    申请人： John Sheu ,  David Bailey ,  Eric Traut ,  Rene Vega

    发明人： John Sheu ,  David Bailey ,  Eric Traut ,  Rene Vega

    IPC分类号： G06F12/00

    CPC分类号： G06F12/1036 ,  G06F2212/151 ,  G06F2212/683

    摘要： A method of virtualizing memory through shadow page tables that cache translations from multiple guest address spaces in a virtual machine includes a software version of a hardware tagged translation look-aside buffer. Edits to guest page tables are detected by intercepting the creation of guest-writable mappings to guest page tables with translations cached in shadow page tables. The affected cached translations are marked as stale and purged upon an address space switch or an indiscriminate flush of translations by the guest. Thereby, non-stale translations remain cached but stale translations are discarded. The method includes tracking the guest-writable mappings to guest page tables, deferring discovery of such mappings to a guest page table for the first time until a purge of all cached translations when the number of untracked guest page tables exceeds a threshold, and sharing shadow page tables between shadow address spaces and between virtual processors.

    摘要翻译： 通过影像页表虚拟化存储器的方法，其缓存来自虚拟机中的多个访客地址空间的转换，包括硬件标记的翻译后备缓冲器的软件版本。 通过拦截向客户页面表创建客户机可写映射，并通过缓存在阴影页表中的翻译来检测访客页面表的编辑。 受影响的缓存翻译被标记为陈旧，并被清除在地址空间开关或客人不加区别地翻译翻译。 因此，非陈旧的翻译仍保持高速缓存，但是陈旧的翻译将被丢弃。 该方法包括跟踪访客页面表的访客可写映射，将此类映射的发现推迟到访客页面表，直到当未跟踪的访客页面表的数量超过阈值时清除所有缓存的翻译，并共享阴影 阴影地址空间和虚拟处理器之间的页表。

    Enhanced shadow page table algorithms
    6.
    发明申请
    Enhanced shadow page table algorithms 有权
    增强的影子页表算法

    公开(公告)号：US20060259732A1

    公开(公告)日：2006-11-16

    申请号：US11128665

    申请日：2005-05-12

    申请人： Eric Traut ,  Matthew Hendel ,  Rene Vega

    发明人： Eric Traut ,  Matthew Hendel ,  Rene Vega

    IPC分类号： G06F12/00 ,  G06F13/00

    CPC分类号： G06F12/1036 ,  G06F12/1009 ,  G06F12/109

    摘要： Enhanced shadow page table algorithms are presented for enhancing typical page table algorithms. In a virtual machine environment, where an operating system may be running within a partition, the operating system maintains it's own guest page tables. These page tables are not the real page tables that map to the real physical memory. Instead, the memory is mapped by shadow page tables maintained by a virtualing program, such as a hypervisor, that virtualizes the partition containing the operating system. Enhanced shadow page table algorithms provide efficient ways to harmonize the shadow page tables and the guest page tables. Specifically, by using tagged translation lookaside buffers, batched shadow page table population, lazy flags, and cross-processor shoot downs, the algorithms make sure that changes in the guest pages tables are reflected in the shadow page tables.

    摘要翻译： 提出了增强的影子页表算法，用于增强典型的页表算法。 在虚拟机环境中，操作系统可能在分区内运行，操作系统维护它自己的访客页表。 这些页表不是映射到真实物理内存的真实页表。 相反，内存由虚拟化程序（例如虚拟机管理程序）维护的影子页表映射，虚拟化包含操作系统的分区。 增强的影子页表算法提供了有效的方式来协调阴影页表和访客页表。 具体来说，通过使用标记的翻译后备缓冲区，批量阴影页表群，延迟标记和跨处理器拍摄，算法确保访客页表中的更改反映在影子页表中。

    Method and system for a second level address translation in a virtual machine environment
    7.
    发明申请
    Method and system for a second level address translation in a virtual machine environment 有权
    在虚拟机环境中进行二级地址转换的方法和系统

    公开(公告)号：US20060206687A1

    公开(公告)日：2006-09-14

    申请号：US11075211

    申请日：2005-03-08

    申请人： Rene Vega

    发明人： Rene Vega

    IPC分类号： G06F12/10 ,  G06F12/00

    CPC分类号： G06F12/1036 ,  G06F12/10 ,  G06F12/1027 ,  G06F12/109 ,  G06F12/145

    摘要： A method of performing a translation from a guest virtual address to a host physical address in a virtual machine environment includes receiving a guest virtual address from a host computer executing a guest virtual machine program and using the hardware oriented method of the host CPU to determine the guest physical address. A second level address translation to a host physical address is then performed. In one embodiment, a multiple tier tree is traversed which translates the guest physical address into a host physical address. In another embodiment, the second level of address translation is performed by employing a hash function of the guest physical address and a reference to a hash table. One aspect of the invention is the incorporation of access overrides associated with the host physical address which can control the access permissions of the host memory.

    摘要翻译： 在虚拟机环境中执行从客户虚拟地址到主机物理地址的转换的方法包括从执行客体虚拟机程序的主计算机接收来宾虚拟地址，并使用主机CPU的面向硬件的方法来确定 客人物理地址。 然后执行到主机物理地址的第二级地址转换。 在一个实施例中，遍历多层树，其将访客物理地址转换为主机物理地址。 在另一个实施例中，通过采用访客物理地址的散列函数和对散列表的引用来执行第二级地址转换。 本发明的一个方面是结合与主机物理地址相关联的访问覆盖，其可以控制主机存储器的访问许可。

    METHOD FOR FORKING OR MIGRATING A VIRTUAL MACHINE
    8.
    发明申请
    METHOD FOR FORKING OR MIGRATING A VIRTUAL MACHINE 有权
    制造或移动虚拟机的方法

    公开(公告)号：US20080098154A1

    公开(公告)日：2008-04-24

    申请号：US11963067

    申请日：2007-12-21

    申请人： Eric Traut ,  Rene Vega

    发明人： Eric Traut ,  Rene Vega

    IPC分类号： G06F9/455 ,  G06F12/00

    CPC分类号： G06F9/4856 ,  G06F9/45537

    摘要： A method is provided for increasing the efficiency of virtual machine processing. A parent virtual machine is provided on a host computer. The parent virtual machine is temporarily or permanently suspended. A child virtual machine is created at a new location by forking the parent virtual machine. The child virtual machine may not initially include all the stored data that is associated with the parent virtual machine.

    摘要翻译： 提供了一种提高虚拟机处理效率的方法。 父虚拟机在主机上提供。 父虚拟机暂时或永久挂起。 通过分叉父虚拟机在新位置创建子虚拟机。 子虚拟机可能最初不包括与父虚拟机相关联的所有存储的数据。

    Method and system for dynamically patching an operating system's interrupt mechanism
    9.
    发明申请
    Method and system for dynamically patching an operating system's interrupt mechanism 有权
    动态修补操作系统中断机制的方法和系统

    公开(公告)号：US20060101181A1

    公开(公告)日：2006-05-11

    申请号：US10982081

    申请日：2004-11-05

    申请人： Bradley Post ,  Rene Vega

    发明人： Bradley Post ,  Rene Vega

    IPC分类号： G06F13/24

    CPC分类号： G06F9/4812 ,  G06F9/45537

    摘要： In a virtual computing machine, a system and method that dynamically patches the interrupt mechanism (in interrupt vector space) of a host computing architecture with guest mode software. Significant increases in performance are achieved without depending on the host code. A patching mechanism evaluates the operating system version, processor, and code to be patched. If patchable, low-level interfaces are created dynamically; a dispatcher is written into an unused location in vector space, and instructions copied from each interrupt vector to be patched to a guest interrupt vector. For an interrupt, the new, patched instructions branch to the dispatcher, which then branches to the appropriate patched interrupt guest code. If the processor is operating as a virtual machine, the guest interrupt code handles the interrupt, otherwise the original copied instructions are replayed, followed by execution at the original host instruction in vector space that exists after the copied and patched instructions.

    摘要翻译： 在虚拟计算机中，使用访客模式软件来动态修补主机计算架构的中断机制（在中断向量空间中）的系统和方法。 在不依赖于主机代码的情况下实现性能的显着提高。 修补机制评估要修补的操作系统版本，处理器和代码。 如果是可修补的，则动态创建低级接口; 调度器被写入向量空间中的未使用位置，并且从每个中断向量复制的指令被修补到客户中断向量。 对于中断，新的修补指令分支到调度程序，然后分支到相应的修补中断客户代码。 如果处理器作为虚拟机运行，则客户机中断代码处理中断，否则重放原始复制指令，然后在复制和修补指令后存在的向量空间中的原始主机指令执行。

    Systems and methods for running a legacy 32-bit x86 virtual machine on a 64-bit x86 processor
    10.
    发明申请
    Systems and methods for running a legacy 32-bit x86 virtual machine on a 64-bit x86 processor 有权
    用于在64位x86处理器上运行旧版32位x86虚拟机的系统和方法

    公开(公告)号：US20060005200A1

    公开(公告)日：2006-01-05

    申请号：US10883496

    申请日：2004-06-30

    申请人： Rene Vega ,  Eric Traut

    发明人： Rene Vega ,  Eric Traut

    IPC分类号： G06F9/46

    CPC分类号： G06F12/10 ,  G06F9/45554 ,  G06F12/1009 ,  G06F2212/1004

    摘要： The present invention provides a virtualized computing systems and methods for transitioning in real time between LONG SUPER-MODE and LEGACY SUPER-MODE in the x86-64 architecture. In doing so, a virtual machine, which relies on the traditional 32-bit modes, i.e., REAL MODE and PROTECTED MODE (V86 SUB-MODE, RING-0 SUB-MODE, and RING-3 SUB-MODE), is able to run alongside other applications on x86-64 computer hardware (i.e., 64-bit). The method of performing a temporary processor mode context switch includes the steps of the virtual machine monitor's setting up a “virtual=real” page, placing the transition code for performing the processor mode context switch on this page, jumping to this page, disabling the memory management unit (MMU) of the x86-64 computer hardware, modifying the mode control register to set either the LONG SUPER-MODE bit or LEGACY SUPER-MODE bit, loading a new page table, and reactivating the MMU of the x86-64 computer hardware.

    摘要翻译： 本发明提供了一种用于在x86-64架构中的LONG SUPER-MODE和LEGACY SUPER-MODE之间实时转换的虚拟化计算系统和方法。 这样做，依靠传统的32位模式，即REAL模式和PROTECTED MODE（V86 SUB-MODE，RING-0 SUB-MODE和RING-3 SUB-MODE）的虚拟机能够 与x86-64计算机硬件（即64位）上的其他应用程序一起运行。 执行临时处理器模式上下文切换的方法包括虚拟机监视器设置“虚拟=真实”页面的步骤，将用于执行处理器模式上下文切换的转换代码放置在该页面上，跳转到该页面，禁用 x86-64计算机硬件的存储器管理单元（MMU），修改模式控制寄存器以设置LONG SUPER-MODE位或LEGACY SUPER-MODE位，加载新的页表，并重新激活x86-64的MMU 电脑硬件。